
Semiconductor
MSM548128BL
1/12
131,072-Word
¥
8-Bit High-Speed PSRAM
DESCRIPTION
The MSM548128BL is a 1-Mbit, high-speed and low power CMOS Pseudo Static RAM organized
as 131,072-word
¥
8-bit.
The MSM548128BL is fabricated using silicon gate N well CMOS process. This process, coupled
with single-transistor memory storage cells, permits maximum circuit density, minimum chip
size, and high speed.
MSM548128BL has Self-refresh mode in addition to Address-refresh mode and Auto-refresh
mode. In Self-refresh mode the internal refresh timer and address counter refresh the dynamic
memory cells automatically. This series allows low power consumption when using standby
mode with Self-refresh.
The MSM548128BL also features a static RAM-like write function that writes the data into the
memory cell at the rising edge of
WE
.
The MSM548128BL is pin compatible with CMOS static RAM and 256K pseudo static RAM.
FEATURES
Large capacity
Fast access time
Low power
Refresh free
Pin compatible
Logic compatible
Single power supply
Refresh
Package compatible
Package options:
32-pin 600 mil plastic DIP
32-pin 525 mil plastic SOP
: 1-Mbit (131,072-word
¥
8 bits)
: 70 ns max.
: 200
μ
A max. (standby with Self-refresh)
: Self refresh
: SRAM, 256K PSRAM
: SRAM
WE
pin, no address multiplex
: 5 V
±
10%
: 512 cycle/8 ms auto-address refresh
: SRAM standard package
(DIP32-P-600-2.54)
(SOP32-P-525-1.27-K) (Product : MSM548128BL-xxGS-K)
xx indicates speed rank.
(Product : MSM548128BL-xxRS)
PRODUCT FAMILY
Family
Package
Access Time (Max.)
70 ns
80 ns
70 ns
80 ns
MSM548128BL-70RS
MSM548128BL-80RS
MSM548128BL-70GS-K
MSM548128BL-80GS-K
600 mil 32-pin
Plastic DIP
525 mil 32-pin
Plastic SOP
This version: Jan. 1998
Previous version: Dec. 1996
E2L0043-17-Y1