參數(shù)資料
型號(hào): MSM6352-XXGS-K
廠商: OKI ELECTRIC INDUSTRY CO LTD
元件分類(lèi): 微控制器/微處理器
英文描述: 4-BIT, MROM, 3.58 MHz, MICROCONTROLLER, PQFP44
封裝: PLASTIC, QFP-44
文件頁(yè)數(shù): 9/22頁(yè)
文件大?。?/td> 210K
代理商: MSM6352-XXGS-K
17/22
MSM6352
Semiconductor
AC input pin
Input pin for system reset. This pin is pulled down to VSS (low level) through a resistor.
When a high level (VDD) signal is input to this pin, the system clock starts oscillation. If this pin
is held at the high level for more than 1 machine cycle after the oscillation has gone into the
stationary state, the internal state is reset. While a high level signal is applied to the AC pin, the
execution of the instruction stored at address 0H is repeated. The system reset is released 0 to
17.9 microseconds after the AC pin is opened, and then the PC is incremented by 1.
Note that the following cannot be stored at address 0H: RDAR instruction, MVAR instruction,
subroutine instructions, jump instructions, and branch instructions.
An AC input takes precedence over any other signal and has the following functions:
– Resets all the bits in the program counter to "0".
– Resets the output latch for the output port (C1-C4) to "0" and puts it into the disable (the output
depends on the HS input pin status) state.
– Resets the output latch for O1 and O2 of the output port and sets the output latch for O3 and
O4 to "1".
– Resets the output latch for the output port (EO1-EO4) to "0".
– Puts the input-output port (IO1-IO4) into output mode and resets the output latch.
– Resets the ETAF and TMF of the timer start circuit and realtime interrupt circuit to "0".
– Resets the 1/100 dividing circuit, PTC, IRQF, EIF, EOF and DPF of the programmable timer
to "0".
– Resets the ETAF, TMF, and ACTF of the halt mode release control circuit and sets the HSTF
to "1".
– Resets the HSF1, HSF2, and RF of the stop mode release control circuit to "0" and sets the HSTF
to "1".
– Stops the watchdog timer.
– Resets the DTMF register of the DTMF output circuit to "0" and sets the HSTF to "1".
– Resets the BD register of the BD output circuit to "0".
The contents of the accumulator (ACC), condition flags (Z, C, G), bank register (B), page register
(P), address registers (AR1, AR2), loop counter (L), dividing circuit (DIV), and RAM are
undefined.
TEST input pin
Input pin for IC testing. This pin is pulled down to VSS (low level) through a resistor and used
to test the internal logic circuits of the IC during manufacturing process.
Connect this pin to VSS.
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