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Semiconductor
MSM64167
Watchdog timer (WDT)
The MSM64167 has a built-in watchdog timer to detect CPU malfunction. The watchdog timer
is composed of a 6-bit watchdog timer counter (WDTC) to count a 16 Hz output and a watchdog
timer control register (WDTCON) to reset WDTC.
Timer (TM)
The MSM64167 contains a 16-bit timer (TM). The timer has three operation modes: auto-reload
mode, capture mode, and clock frequency measuring mode. It counts at 32.768 kHz or 700 kHz
or by an external clock. The timer is used for pulse generation, time measurement, etc., and is
also used as an A/D conversion counter at A/D conversion and as a baud rate generator at serial
communication.
Clock generation circuit (2CLK)
The MSM64167 has a clock generation circuit (2CLK) that generates clocks of two types: low-
speed and high-speed. The circuit consists of a 32.768 kHz crystal oscillation circuit, a 700 kHz
RC oscillation circuit, and a clock control section. This circuit generates the system clock (CLK),
crystal oscillation clock (32.768 kHz), and RC oscillation clock (700 kHz).
The system clock is the basic operation clock of the CPU, and the crystal oscillation clock is the
basic operation clock of the time-base counter and the buzzer driver. The crystal oscillation clock
and RC oscillation clock are supplied to the timer to become a timer clock.
The system clock frequency is switched between 32.768 kHz (output of the crystal oscillation
circuit) and 700 kHz (output of the RC oscillation circuit) based on the contents of the frequency
control register (FCON).
Note: The oscillation frequency of the RC oscillation circuit varies depending on the value of
external resistor (ROS), operating voltage (VSS2), and ambient temperature (Ta).
Time base counter (TBC)
The MSM64167 has a built-in time base counter (TBC) that generates clocks to be supplied to
internal peripheral circuits. The time base counter is composed of 15 binary counters. The count
clock of the time base is driven by the oscillation clock (32.768 kHz) of the crystal oscillation
circuit. The output of the time base counter is used for the buzzer driver, the system reset circuit,
the timer, the watchdog timer, the time base interrupt, the sampling clocks of each port, and the
LCD driver.
Interrupt (INTC)
The MSM64167 has ten interrupt sources (10 vector addresses), of which two are external
interrupts from ports and eight are internal interrupts.
Of the ten interrupt sources, only the watchdog interrupt cannot be disabled (non-maskable
interrupt). The other nine interrupts are controlled by the master interrupt enable flag (MI) and
the interrupt enable registers (IE0, IE1, and IE2). When an interrupt condition is met, the CPU
branches to a vector address corresponding to the interrupt source.