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參數(shù)資料
| 型號： | MSM64P155-XXXGS-BK |
| 廠商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, 0.032768 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100 |
| 文件頁數(shù)： | 2/25頁 |
| 文件大小： | 208K |
| 代理商： | MSM64P155-XXXGS-BK |
MSM64P155
Semiconductor
9/23
Secondary Functions
I
P2.0 to P2.3 secondary functions :
These are level-triggered external interrupt input pins.
Select interrupt enable/disable for each bit with the P2 interrupt
enable register (P2IE).
If P2.0 to P2.3 pins are set to "H" level for a minimum of 2 seconds,
the device enters system reset mode.
P2.0, P2.1 secondary functions :
trigger input pins for capture circuit.
8
7
6
5
External
Interrupts
I
P3.0 secondary function :
This is an input pin for external interrupt. This pin can receive an
interrupt at a rising edge, a falling edge, or at both rising and falling
edges.
10
I
P6.0 to P6.3 secondary functions :
These are level-triggered external interrupt input pins.
18
17
16
15
I
P7.0 to P7.3 secondary functions :
These are level-triggered external interrupt input pins.
22
21
20
19
I
P3.1 secondary function :
Input port for event counter
9
Event
Counter
Input
Pin
Description
Type
Function
P2.0
P2.1
P2.2
P2.3
P3.0
P6.0
P6.1
P6.2
P6.3
P7.0
P7.1
P7.2
P7.3
P3.1
Symbol
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