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參數(shù)資料
| 型號(hào)： | MSM64P164-XXXGS-V1K |
| 廠商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, 0.066 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | QFP-80 |
| 文件頁數(shù)： | 6/61頁 |
| 文件大?。?/td> | 232K |
| 代理商： | MSM64P164-XXXGS-V1K |
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1-8
Table 1-2 Explanation of Pins (Secondary Functions)
P4.3
28
Output Secondary function of P4.3:
This is a monitor output (MON) of a CR oscillaiton clock
(OSCCLK) for an A/D converter and a 400 kHz CR oscillation
clock for a system clock.
Type
Pin
Name
Pin
No.
Function
External
Interrupt
P0.0
77
Input
Secondary functions of P0.0 to P0.3:
External interrupt input pins. These can receive an interrupt
based on a level variation.
Input/
Output
P0.1
78
P0.2
79
P0.3
80
Input
Secondary functions of P2.0 to P2.3, P3.0 to P3.3, and P4.0 to
4.3:
External interrupt input pins . These can receive an interrupt
based on a level variation.
P3.0
22
P3.1
23
P3.2
24
P3.3
25
P4.0
26
P4.1
27
P4.2
28
P4.3
29
P0.0
77
Input
Secondary functions of P0.0 and P0.1:
Trigger input pins of the capture circuit.
Capture
Trigger
P2.0
18
P2.1
19
P2.2
20
P2.3
21
P0.1
78
P4.0
26
Output Secondary function of P4.0:
This is allocated to the data output of a serial port (SOUT).
Serial
Port
P3.3
25
Input
Secondary function of P3.3:
This is allocated to the data input of a serial port (SIN).
P4.1
27
Output Secondary function of P4.1:
This is allocated to the data output of a serial port (SPR).
P4.2
28
Input/
Output
Secondary function of P4.2:
This is allocated to the clock input and output of a serial port
(SCLK).
CR
Oscillation
Monitor
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