參數(shù)資料
型號(hào): MSM65512A-XXXRS
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 10 MHz, MICROCONTROLLER, PDIP40
封裝: 0.600 INCH, 2.54 MM PITCH, PLASTIC, DIP-40
文件頁數(shù): 23/24頁
文件大?。?/td> 219K
代理商: MSM65512A-XXXRS
7/23
Semiconductor
MSM65512A/65P512A
Secondary Functions
Symbol
Type
Description
INT0
P2.2 secondary function
External interrupt 0 input pin.
I
INT1/GATE
P2.3 secondary functions
External interrupt 1 input pin. Also used as input pin for gate signal
for timer 0 count enable/disable.
I
T0CK
P2.4 secondary function
Timer 0 external clock input pin.
I
HSTOP
P2.5 secondary function
Hard stop mode input pin; stops system clock oscillation with "L" level input.
I
WR
P2.6 secondary function
Write strobe signal output pin during external data memory access.
O
T1OUT
P2.7 secondary function
Output pin for signal obtained by dividing timer overflow by 2.
O
SFTO
P3.5 secondary function
Shift register data output pin.
O
SFTI
P3.6 secondary function
Shift register data input pin.
I
SFTCK
P3.7 secondary function
Shift register synchronizing clock input/output pin.
I/O
RXD
P2.0 secondary functions
UART: Input pin for serial port receive data.
Synchronous: Input/output pin for serial port transmit/receive data.
I/O
TXD
O
T2CK
P3.0 secondary function
Timer 2 external clock input pin.
I
CAP
P3.1 secondary function
Capture trigger input pin.
I
CMP0
P3.2 secondary function
Compare output channel 0 output pin.
O
CMP1
P3.3 secondary function
Compare output channel 1 output pin.
O
INT2
P3.4 secondary function
External interrupt 2 input pin
I
P2.1 secondary functions
UART: Output pin for serial port transmit data.
Synchronous: Output pin for serial port synchronizing clock.
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