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參數(shù)資料
| 型號(hào)： | MSM65P524-XXXGS-BK |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64 |
| 文件頁(yè)數(shù)： | 26/27頁(yè) |
| 文件大小： | 202K |
| 代理商： | MSM65P524-XXXGS-BK |
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Semiconductor
MSM65524A/65P524
Secondary Functions
Symbol
Type
Description
INT0
P2.2 secondary function
External interrupt 0 input pin.
I
INT1/GATE
P2.3 secondary functions
External interrupt 1 input pin. Also used as input pin for gate signal
for timer 0 count enable/disable.
I
T0CK
P2.4 secondary function
Timer 0 external clock input pin.
I
HSTOP
P2.5 secondary function
Hard stop mode input pin; stops system clock oscillation with "L" level input.
I
WR
P2.6 secondary function
Write strobe signal output pin during external data memory access.
O
T1OUT
P2.7 secondary function
Output pin for signal that 2-divided timer 1 overflow.
O
SFTO
P3.5 secondary function
Shift register data output pin.
O
SFTI
P3.6 secondary function
Shift register data input pin.
I
SFTCK
P3.7 secondary function
Shift register synchronizing clock input/output pin.
I/O
RXD
P2.0 secondary function
UART: Input pin for serial port receive data.
Synchronous: Input/output pin for serial port transmit/receive data.
I/O
TXD
P2.1 secondary function
UART: Output pin for serial port transmit data.
Synchronous: Output pin for serial port synchronizing clock.
O
T2CK
P3.0 secondary function
Timer 2 external clock input pin.
I
CAP
P3.1 secondary function
Capture trigger input pin.
I
CMP0
P3.2 secondary function
Compare output channel 0 output pin.
O
CMP1
P3.3 secondary function
Compare output channel 1 output pin.
O
INT2
P3.4 secondary function
External interrupt 2 input signal.
I
PWM0
P5.0 secondary function
PWM channel 0 output pin.
O
PWM1
P5.1 secondary function
PWM channel 1 output pin.
O
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