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參數(shù)資料
| 型號： | MSM6636GS-K |
| 廠商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 41.6K bps, LOCAL AREA NETWORK CONTROLLER, PDSO24 |
| 封裝： | 0.430 INCH, 1.27 MM PITCH, PLASTIC, SOP-24 |
| 文件頁數(shù)： | 40/73頁 |
| 文件大?。?/td> | 646K |
| 代理商： | MSM6636GS-K |
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MSM6636/6636B User’s Manual
Function Details
5 – 6
BUS(–)’s short circuit to V
DD
INT
BUS(–)’s short circuit to V
DD
BNV flag is set.
Clear processing of BNV flag
BNV flag is set.
BUS(–)
BUS(+)
Bus input is switched to BUS(+) only.
At a bus idle status, when BUS(–) is short-circuited to V
DD, the abnormality of LAN bus is not detected until
messages are output on LAN bus (until the status of LAN bus is changed) because of no change at the status of
LAN bus. When the messages are output on LAN bus, the interrupt request flag BNV is set from judging that
BUS(–) is short-circuited after a fixed time. Then the BUS(+) input only is switched to the reception input. At the
bus idle status, if BNV flag is cleared, the abnormality of LAN bus is not detected until messages are again output
on LAN bus. When the disable setting bit (NB0) of the LAN BUS output is “0”, the output drive of the LAN
BUS(–) output is disabled when BNV flag is set. After a short circuit is detected, when a frame of communication
finishes, the status of LAN bus returns to the bus idle status and the BUS(–) output again returns to an output
enable status. Therefore, when the status of the short circuit continues, note that the transistors mounted externally
are driven during the top SOF signal dominant period per one communication frame.
In addition, the
abovementioned automatic return function is not operated and the output drive can be completely stopped by
setting the disable setting bit (NB0) of the LAN bus output to “1”.
Note: When BUS(–) (passive state) is short-circuited, the overcurrent flows in the external bus drivers only
during the SOF dominant period.
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