參數(shù)資料
型號(hào)： MSM6665C-XX
廠商： LAPIS SEMICONDUCTOR CO LTD
元件分類： 顯示控制器
英文描述： 16 X 80 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC117
封裝： 6.09 X 4.97 MM, ALUMINIUM PAD, DIE-117
文件頁(yè)數(shù)： 2/33頁(yè)
文件大小： 623K
代理商： MSM6665C-XX
9/32
OKI Semiconductor
MSM6665C-xx
OSC1
OSC2
OSC3
10k W
62
±5kW
56pF
OSC1
OSC2
OSC3
80kHz
OPEN
[External master clock input]
[RC oscillation circuit formation]
< Oscillation circuit wiring diagram >
TEST1, TEST2, TEST3
Test signal input pins.
The manufacturer uses these pins for testing.
The user should make these pins short-circuited to GND or open.
OSC1, OSC2, OSC3
Pins used for 80kHz RC oscillation circuit formation and as external master clock input
pin. OSC2 and OSC3 are open during input of external master clock. See diagram below.
C1 to C17, S1 to S80 (Common 1 - 17, Segment 1 - 80)
LCD output pins to be connected with the LCD panel. Turning into AC is made by frame
inversion. During use at 1/9duty, C1 to C9 pins are used, and C10 to C17 pins are set
open. See figure below.
Arbitrator
Cursor
<Relationship between panel and LCD output>
S1
S80
C17
C16
C10
C9
C8
C2
C1
Cursor
VDD, VSS
Supply voltage pins. VDD should be set at "H" level.
VSS is a GND pin. If the battery is used, VDD is connected to the + pin, and VSS to the
– pin.
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