18-1
MSM66577 Family User's Manual
Chapter 18 Bus Port Functions
18
18 Bus Port Functions
18.1 Overview
The MSM66577 family can externally expand program memory (usually ROM) up to a
maximum of 1MB and data memory (usually RAM) up to a maximum of 1MB. With the
SELMBUS pin setting, a multiplexed bus type (address/data time division) or a separate
bus type (independent address/data buses) can be selected for the bus port interface of the
MSM66577 family.
Bus ports (A0 to A19, D0 to D7) and control signals (SELMBUS, ALE,
PSEN, RD, WR) are
used to access the external program memory and external data memory.
When the SELMBUS pin is at a high level, bus ports are configured as the separate bus with
20 address (A0 to A19) lines and 8 data (D0 and D7) lines and assigned as the secondary
functions of port 0 (P0), port 1 (P1), port 2 (P2) and port 4 (P4). Unnecessary upper
addresses can be reset as normal I/O ports.
PSEN (P3_1) is used as a strobe signal to read the external program memory. RD (P3_2)
and
WR (P3_3) are used as read and write strobes for external data memory.
When the SELMBUS pin is at a low level, bus ports are configured as the multiplexed bus
with 12 address (A8 to A19) lines and 8 address/data combined lines (D0 to D7) and
assigned as the secondary functions of port 0 (P0), port 1 (P1), and port 2 (P2).
Unnecessary upper addresses can be reset as normal I/O ports.
18.2 Port Operation
18.2.1 Port Operation When Accessing Program Memory
Separate bus type (the SELMBUS pin at a high level)
When accessing internal program memory (addresses 0H to 1FFFFH with the
EA pin at a
high level), P0, P1, P2, P3_1 and P4 operate as I/O ports.
When accessing external program memory (the
EA pin at a low level or addresses 20000H
to FFFFFH with the
EA pin at a high level), P0 operates as the program data input port, P1,
P2, and P4 operate as address output ports, and P3_1 operates as the
PSEN output port.
If the
EA pin is at a low level, P0, P1, P2, P3_1 and P4 are automatically switched
(secondary function control registers and mode registers are set) to bus port and control
signal functions (hereafter referred to as bus port functions) when reset (
RES signal input,
execution of a BRK instruction, overflow of the watchdog timer, opcode trap). If the
EA pin
is at a high level, bus port functions are not automatically switched. It is necessary to switch
to bus port functions before external program memory is accessed by setting secondary
function control registers and mode registers on software.
Of the ports that are automatically set as bus port functions when the
EA pin is at a low level,
if upper address or other output is unnecessary, then after reset, those ports can be
operated as I/O ports by resetting their secondary function control register.
Table 18-1 lists the operation of P0, P1, P2, P3_1 and P4 in the separate bus type during
a program memory access.