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參數(shù)資料
| 型號： | MSM7533V |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 元件分類： | Codec |
| 英文描述： | 2ch Single Rail CODEC |
| 中文描述： | 2通道單鐵編解碼器 |
| 文件頁數(shù)： | 5/18頁 |
| 文件大小： | 140K |
| 代理商： | MSM7533V |
Semiconductor
MSM7533H/7533V/7534
5/18
V
DD
Power supply for +5 V.
A power supply for an analog circuit of the system which the device is applied should be used.
A bypass capacitor of 0.1
m
F to 1
m
F with excellent high frequency characteristics and a capacitor
of 10
m
F to 20
m
F should be connected between this pin and the AG pin if needed.
DIN1
DIN1 is the PCM signal input for channel 1, when the parallel mode is selected.
A serial PCM signal input to this pin is converted to an analog signal in synchronization with the
RSYNC signal and BCLK signal.
The analog signal is output from the AOUT1 pin.
The data rate of the PCM signal is equal to the frequency of BCLK signal.
The PCM signal is shifted at a falling edge of the BCLK signal and latched into the internal register
when shifted by eight bits.
The start of the PCM data (MSD) is identified at the rising edge of RSYNC.
When the serial mode is selected, this pin is not used and should be connected to GND (0 V).
DIN2
DIN2 is the PCM signal input for channel 2, when the parallel mode is selected.
A serial PCM signal input to this pin is converted to an analog signal in synchronization with the
RSYNC signal and BCLK signal.
The analog signal is output from the AOUT2 pin.
The data rate of the PCM signal is equal to the frequency of BCLK signal.
The PCM signal is shifted at a falling edge of the BCLK signal and latched into the internal register
when shifted by eight bits.
The start of the PCM data (MSD) is identified at the rising edge of RSYNC.
When the serial mode is selected, this pin is used for the 2ch multiplexed PCM signal input.
BCLK
Shift clock signal input for the DIN1, DIN2, DOUT1, and DOUT2 signals.
The frequency, equal to the data rate, is 64, 96, 128, 192, 256, 384, 512, 768, 1024, 1536, 1544, 2048,
or 200 kHz. Setting this signal to logic "1" or "0" drives both transmit and receive circuits to the
power saving state.
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PDF描述 |
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| MSM7534 | 2ch Single Rail CODEC |
| MSM7540L | Single Rail ADPCM CODEC |
| MSM7540 | Single Rail ADPCM CODEC |
| MSM7541 | Single Rail CODEC |
| MSM7542 | Single Rail CODEC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSM7533VGS-K | 制造商:ROHM Semiconductor 功能描述: |
| MSM7534 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:2ch Single Rail CODEC |
| MSM7540 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:Single Rail ADPCM CODEC |
| MSM7540G3-K | 制造商:ROHM Semiconductor 功能描述: |
| MSM7540L | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:Single Rail ADPCM CODEC |
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