參數(shù)資料
型號(hào)： MSM7590
廠商： OKI SEMICONDUCTOR CO., LTD.
元件分類： Codec
英文描述： 5V Sinlge-Rail ADPCM CODECs
中文描述： 5V的Sinlge擺幅差分PcM編解碼器
文件頁(yè)數(shù)： 5/26頁(yè)
文件大小： 173K
代理商： MSM7590
5/26
Semiconductor
MSM7590L-01
SAO+, SAO–
Differential analog outputs for sound output.
Control register data CR4-B5 determines the output pins (AOUT+ and AOUT- /SAO+ and SAO-
) for the voice signal and an acoustic component of the sound tone, DTMF tone, R tone, F tone,
and various types of tones at either the VFRO pin or the SAO+ and SAO- pins. The output load
conditions of these pins are the same as those of AOUT+ and AOUT-.
SG
Analog signal ground.
The output voltage of this pin is approximately 1.4 V. Put the bypass capacitors (10
μ
F in parallel
with 0.1
μ
F ceramic type) between this pin and AG to get the specified noise characteristics.
During power-down, this output voltage is 0 V. The SG voltage if necessary, should be via a
buffer.
AG
Analog ground.
DG
Digital ground.
This ground is separated from the analog signal ground pin (AG). The DG pin must be kept as
close as possible to AG on the PCB.
V
DD
+3 V power supply.
PDN/RESET
Power down and reset control input.
A “0” level makes the IC enter a power down state. At the same time, all control register data are
reset to the initial state. Set this pin to “1” during normal operating mode. The power down state
is controlled by a logical OR with CR0-B5 of the control register. When using
PDN/RESET
for
power down and reset control, set CR0-B5 to digital “0”. The reset width (during "L") is 200 ns
or more.
MCK
Master clock input.
The frequency must be 10.368 MHz. The master clock signal may be asynchronous with BCLK,
XSYNC, and RSYNC.
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參數(shù)描述
MSM7590L-01 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:Multi-Function ADPCM CODEC
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