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參數(shù)資料
| 型號： | MSM7728 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 元件分類： | Codec |
| 英文描述： | Single Rail Linear CODEC |
| 中文描述： | 單軌線性編解碼器 |
| 文件頁數(shù)： | 15/23頁 |
| 文件大?。?/td> | 150K |
| 代理商： | MSM7728 |
Semiconductor
MSM7728
15/23
TIMING DIAGRAMS
CODEC Interface Timing
Figure 2 Processor Timing Diagram
BCLK
1
2
3
4
5
6
7
8
9
10
SYNC
PCMOUT
D9
D10 D11 D12 D13 D14
MSD
t
XS
t
SX
t
SD
t
XD1
t
XD2
t
XD3
BCLK
SYNC
PCMIN
Transmit Timing
Receive Timing
11
When t
XS
￡
1/2 Fc, the Delay of the MSD bit is defined by t
XD1
.
When t
SX
<
1/2 Fc, the Delay of the MSD bit is defined by t
SD
.
12
13
14
15
16
17
D2
D3
D4
D5
D6
D7
D8
1
2
3
4
5
6
7
8
9
10
D9
D10 D11 D12 D13
MSD
t
RS
t
SR
t
DS
D6
11
12
13
14
15
16
17
D2
D3
D4
D5
D7
D8
t
DH
18
19
t
WSH
t
WSL
t
WSL
D14
18
19
t
WSH
Figure 1 Basic Timing Diagram
Processor Interface Timing
t
WR1
t
WR2
DCLK
1
2
3
4
5
6
7
8
B3
B4
A0
A1
A2
B2
B1
B0
t
CDS
t
CDH
t
WCL
t
WCH
t
WR3
t
WR4
CDIN
WRN
RDN
CDOUT
H
Hi-Z
WRITE Mode
t
RD1
t
RD2
DCLK
1
2
3
4
5
6
7
8
X
X
A0
A1
A2
X
X
X
t
RD3
t
RD4
CDIN
RDN
CDOUT
Hi-Z
READ Mode
B3
B4
B2
B1
B0
t
CD1
t
CD2
WRN
H
P
RDN
P
WRN
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PDF描述 |
|---|---|
| MSM7731-01 | Multifunction PCM CODEC (Voice Signal Processor) |
| MSM7731-02 | Dual Echo Canceler & Noise Canceler with Dual Codec for Hands-Free |
| MSM80C154S | CMOS 8-bit Microcontroller |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSM7731 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:Dual Echo Canceler & Noise Canceler with Dual Codec for Hands-Free |
| MSM7731-01 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:Multifunction PCM CODEC (Voice Signal Processor) |
| MSM7731-02 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:Dual Echo Canceler & Noise Canceler with Dual Codec for Hands-Free |
| MSM7731-02GAZ020 | 制造商:ROHM Semiconductor 功能描述: |
| MSM7731-02GAZ03A | 制造商:ROHM Semiconductor 功能描述: |
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