參數(shù)資料
型號(hào)： MSM7731-01
廠商： OKI SEMICONDUCTOR CO., LTD.
元件分類： Codec
英文描述： Multifunction PCM CODEC (Voice Signal Processor)
中文描述： 多功能的PCM編解碼器（語(yǔ)音信號(hào)處理器）
文件頁(yè)數(shù)： 5/43頁(yè)
文件大?。?/td> 247K
代理商： MSM7731-01
5/43
Semiconductor
MSM7731-01
PIN FUNCTIONAL DESCRIPTION
AIN, AGSX
These are the acoustic analog input and level adjusting pins. The AIN pin is connected to the
inverting input of the internal amp and the AGSX pin is connected to the amp output. For level
adjustment, refer to the diagram below (Figure 1). At power-down reset, the AGSX pin goes to
a high impedance state.
AVFRO, AOUT, APWI
These are the acoustic analog output and level adjusting pins. The AVFRO pin is an audio
output and can directly drive 20 k
W
. The AOUT pin is an analog output and can directly drive
a load of 1.2 k
W
. For level adjustment, refer to the diagram below (Figure 1). At power-down
reset, these output pins go to a high impedance state.
LIN, LGSX
These are the line analog input and level adjusting pins. The LIN pin is connected to the
inverting input of the internal amp and the LGSX pin is connected to the amp output. For level
adjustment, refer to the diagram below (Figure 1). At power-down reset, the LGSX pin goes to
a high impedance state. If LIN is not used, short the LIN and LGSX pins together.
LVFRO, LOUT, LPWI
These are the line analog output and level adjusting pins. The LVFRO pin is an audio output
and can directly drive 20 k
W
. The LOUT pin is an analog output and can directly drive a load
of 1.2 k
W
. For level adjustment, refer to the diagram below (Figure 1). At power-down reset,
these output pins go to a high impedance state. If LOUT is not used, short the LPWI and LOUT
pins together.
LINEEN
This is the power-down control pin for the line CODEC. A logic "0" continues normal operation
and a logic "1" powers down only the line CODEC. If the line CODEC is not used, power down
the line CODEC and short the LIN pin to the LGSX pin and the LPWI pin to the LOUT pin. This
procedure results in the low consumption of electrical power. At power-down, the output pins
go to a high impedance state. Since this pin is ORed with CR0-B5 of the control register, set the
pin to a logic "0" when controlling power-down by the control register. If the pin setting is
changed, reset must be activated by either the
PDN
/
RST
pin or the PDN/RST bit (CR0-B7).
Figure 1 Analog Interface
Acoustic CODEC
+
–
SG
AIN
AGSX
R2
R1
C1
V
I
R2
≥
20k
W
V
AGSX
/V
I
=R2/R1
￡
30
+
–
10
m
F
0.1
m
F
R3
R4
+
–
APWI
AOUT
C2
V
O
Speaker
Speaker amp
V
O
/V
AVFRO
=R3/R4
R3
≥
20k
W
Line CODEC
LGSX
LIN
LVFRO
LPWI
LOUT
LINEEN
Same as the acoustic
analog interface
Line side (portable phone)
Reception signal
Transmission signal
Acoustic side (microphone, speaker)
Microphone
VREF
to ENCODER
from DECODER
AVFRO
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