- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45392 > MSM80C50-XXXRS (LAPIS SEMICONDUCTOR CO LTD) 8-BIT, MROM, 6 MHz, MICROCONTROLLER, PDIP40 PDF資料下載
參數(shù)資料
| 型號： | MSM80C50-XXXRS |
| 廠商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 6 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | 0.600 INCH, 2.54 MM PITCH, PLASTIC, DIP-40 |
| 文件頁數(shù)： | 7/21頁 |
| 文件大?。?/td> | 169K |
| 代理商： | MSM80C50-XXXRS |
14/20
Semiconductor
MSM80C48/49/50, MSM80C35/39/40
FUNCTIONAL DESCRIPTION
Added Functions of MSM80C48, MSM80C49 and MSM80C50
The MSM80C48, MSM80C49 and MSM80C50 are basically incorporated with the capabilities of
Intel's 8048, 8049, and 8050 plus the following new functions:
1.
Power-Down Mode Enhancements
1.1 Power-down by software
(1) Clock (See item 4, "Power-down mode", for details.)
a.
Crystal oscillator halt (HLTS instruction)
Power requirements can be minimized.
b.
Clock supply halt (HALT instruction)
Restart is accomplished without oscillator wait.
(2) I/O ports
I/O port floating instructions
Power consumption resulting from inputs/outputs can be minimized with FLT and FLTT
instructions.
Port floating is cancelled by executing FRES instruction, "0" level at INT pin or "0" level at
RESET pin.
(3) Six types of power-down can be done by a combination of HLTS/HALT and FLT/FLTT
instructions.
1.2 Power-down by hardware (See 4.3, Power-down mode by VDD pin utilization for
details.)
Crystal oscillators can be halted by controlling the VDD pin, thereby floating all I/O ports
for minimum power consumption.
2.
Additional Instructions (11)
HLTS
MOV A, P2
HALT
MOVP1, @ R3
FLT
MOVP1 P, @R3
DEC @Rr
FRES
DJNZ @ Rr, addr
MOV A, P1
3.
Improved Uses of BUS P0-7, P10-7, P20-7, and SS pins
3.1 BUS P0-7
The MSM80C48, MSM80C49, and MSM80C50 remove the limitation on the use of OUTL
BUS, A instructions during the external ROM access mode by having an independent data
latch and external ROM mode address latch in BUS P0-7.
Consequently, there is no need to relocate bus port instructions when in the external ROM
access mode.
3.2 P10-7 and P20-7
The MSM80C48, MSM80C49 and MSM 80C50 are designed to minimize power consumption
when P10-7 and P20-7 are used as input/output ports, to maximize the performance of
CMOS.
When these ports are used as output ports, the acceleration circuit is actuated only when
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MSM80C49-XXXRS | 8-BIT, MROM, 11 MHz, MICROCONTROLLER, PDIP40 |
| MSM80C51-RS | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PDIP40 |
| MSM80C51F-GS-K | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP44 |
| MSM80C51-JS | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQCC44 |
| MSM80C31-RS | 8-BIT, 12 MHz, MICROCONTROLLER, PDIP40 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSM80C51F | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:CMOS 8-Bit Microcontroller |
| MSM80C85 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:8-Bit CMOS MICROPROCESSOR |
| MSM80C85A-2RS | 制造商:OKI Semiconductor 功能描述:Microprocessor, 8 Bit, 40 Pin, Ceramic, DIP |
| MSM80C85AH | 制造商:OK International 功能描述: |
| MSM80C85AHGS | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:8-Bit CMOS MICROPROCESSOR |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。