參數(shù)資料
型號(hào): MSM80C88A-10RS
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 10 MHz, MICROPROCESSOR, PDIP40
封裝: 0.600 INCH, 2.54 MM PITCH, PLASTIC, DIP-40
文件頁數(shù): 36/38頁
文件大?。?/td> 299K
代理商: MSM80C88A-10RS
6/37
Semiconductor
MSM80C88A-10RS/GS/JS
AC CHARACTERISTICS
Minimum Mode System
Timing Requirements
Parameter
Symbol
Unit
Max.
Min.
10 MHz Spec.
VCC = 4.75 V to 5.25 V
Ta = 0 to +70°C
Data in Setup Time
TDVCL
20
ns
Data in Hold Time
TCLDX
10
ns
Max.
Min.
8 MHz Spec.
VCC = 4.75 V to 5.25 V
Ta = 0 to +70°C
20
10
Max.
Min.
5 MHz Spec.
VCC = 4.5 V to 5.5 V
Ta = -40 to +85°C
30
10
CLK Rise Time
(From 1.0 V to 3.5 V)
TCH1CH2
—10
ns
—10
10
CLK Fall Time
(From 3.5 V to 1.0 V)
TCL2CL1
—10
ns
—10
10
CLK Cycle Period
TCLCL
100
DC
ns
CLK Low Time
TCLCH
46
ns
CLK High Time
TCHCL
44
ns
125
DC
68
44
200
DC
118
69
READY Setup Time into
MSM80C88A-10
TRYHCH
46
ns
READY Hold Time into MSM80C88A-10 TCHRYX
20
ns
68
20
118
30
RDY Setup Time into
MSM 82C84A-2 (See Notes 1, 2)
TR1VCL
35
ns
35
35
RDY Hold Time into MSM 82C84A-2
(See Notes 1, 2)
TCLR1X
0—
ns
0—
0
HOLD Setup Time
THVCH
20
ns
20
35
READY inactive to CLK
(See Note 3)
TRYLCL
–8
ns
–8
–8
TIHIL
—15
ns
—15
15
INTR, NMI, TEST Setup Time
(See Note 2)
TINVCH
15
ns
15
30
Input Rise Time (Except CLK)
(From 0.8 V to 2.0 V)
TILIH
—15
ns
—15
15
Input Fall Time (Except CLK)
(From 2.0 V to 0.8 V)
相關(guān)PDF資料
PDF描述
MSM81C55-5GS-VK 22 I/O, PIA-GENERAL PURPOSE, PQFP44
MSM81C55GS-K 22 I/O, PIA-GENERAL PURPOSE, PQFP44
MSM81C55-5GS-K 22 I/O, PIA-GENERAL PURPOSE, PQFP44
MSM81C55JS 22 I/O, PIA-GENERAL PURPOSE, PQCC44
MSM82C37B-5GS-2K 4 CHANNEL(S), 5 MHz, DMA CONTROLLER, PQFP44
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