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參數(shù)資料
| 型號： | MSM81C55-5GS-2K |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 22 I/O, PIA-GENERAL PURPOSE, PQFP44 |
| 封裝： | 0.80 MM PITCH, PLASTIC, QFP-44 |
| 文件頁數(shù)： | 4/19頁 |
| 文件大小： | 147K |
| 代理商： | MSM81C55-5GS-2K |
12/19
Semiconductor
MSM81C55-5RS/GS/JS
(2) Reading the C/S Register
The I/O and timer status can be accessed by reading the contents of the Status register
located at I/O address xxxxx000. The status word format is shown below:
(3) PA and PB Registers
These registers may be used as either input or output ports depending on the programmed
contents of the C/S register. They may also be used either in the basic mode or in the strobe
mode.
I/O address of the PA register: xxxxx001
I/O address of the PB register: xxxxx010
(4) PC Register
The PC register may be used as an input port, output port or control register depending on
the programmed contents of the C/S register. The I/O address of the PC register is
xxxxx011.
(5) Timer
The timer is a 14-bit down counter which counts TIMER IN pulses.
The low order byte of the timer register has an I/O address of xxxxx100, and the high order
byte of the register has an I/O address of xxxxx101.
The count length register (CLR) may be preset with two bytes of data. Bits 0 through 13 are
assigned to the count length and bits 14 and 15 specify the timer output mode. A read
operation of the CLR reads the contents of the counter and the pertinent output mode. The
initial value range which can initially be loaded into the counter is 2 through 3FFF hex. Bit
assignments to the timer counter and possible output modes are shown in the following.
INTR
A
Port A Interrupt Request
AD0
A
BF
Port A Buffer Full
AD1
INTE
A
AD2
INTR
B
AD3
B
BF
AD4
INTE
B
AD5
TIMER
AD6
AD7
Port A Interrupt Enable
Port B Interrupt Request
Port B Buffer Full
Port B Interrupt Enable
Timer Interrupt. This bit is set high when the timer
reaches TC, and is reset when the C/S register is read
or a hardware reset occurs.
M2
M1
T13
T12
T11
T10
T9
T8
Output Mode
High Order 6 Bits of Count Length
T7
T6
T5
T4
T3
T2
T1
T0
Low Order Byte of Count Length
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MSM81C55-5JS | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:2048-Bit CMOS STATIC RAM WITH I/O PORTS AND TIMER |
| MSM81C55-5RS | 制造商:ROHM Semiconductor 功能描述: 制造商:OK International 功能描述: |
| MSM82C37B-5GS | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:PROGRAMMABLE DMA CONTROLLER |
| MSM82C37B-5JS | 制造商:OK International 功能描述:4 CHANNEL(S), 5 MHZ, DMA CONTROLLER, PQCC44 |
| MSM82C37B-5RS | 制造商:OK International 功能描述:4 CHANNEL(S), 5 MHz, DMA CONTROLLER, PDIP40 |
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