參數(shù)資料
型號(hào): MSM82C43RS
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: 微控制器/微處理器
英文描述: 20 I/O, PIA-GENERAL PURPOSE, PDIP24
封裝: 0.600 INCH, 2.54 MM PITCH, PLASTIC, DIP-24
文件頁數(shù): 14/14頁
文件大小: 141K
代理商: MSM82C43RS
Semiconductor
MSM82C43
8/13
PIN FUNCTIONS
Pin
PROG
CS
P20 – P23
P40 – P43
P50 – P53
P60 – P63
P70 – P73
VCC
GND
Function
Clock input from MSM80C49. When PROG is changed from "H" to "L", MSM82C43 STARTS
operating in accordance with an order from MSM80C49.
Input for chip select. Outputs and internal status cannot be changed when CS is "H".
4-bit bidirectional I/O ports. When connected to P20 thru P23 of MSM80C49, direct data
transfer from port to accumulator and from accumulator to port is possible.
4-bit bidirectional I/O ports.
Data is latched statistically when output to ports, but is only valid while PROG is at "L" level
when input.
+5V power supply
GROUND
FUNCTIONS
Power-on reset mode
Upon powered on, ports to 7 are 3-stated, and 2 is put into an input mode.
Write mode
Execution of MOVDPp, A, ORLDPp, A, ANLDPp, and A by MSM80C49 enables direct output
of accumulator contents to ports 4 thru 7, and output to the ports after ORing or ANDing with
port data. The port data is latched statistically at this time and remains unchanged until
execution of the next instruction.
Read mode
Execution of MOVDA andPp results in data of ports 4 thru 7 being accepted by the accmulator.
Note that port data is valid only while PROG is at "L" level. When at "H" level, ports 4 thru 7 are
switched to tristate and port 2 is switched to input mode.
Address and instruction code
Instruction
Port
P23
P22
P21
P20
Read
Port 4
00
Write
Port 5
01
OR
Port 6
10
AND
Port 7
11
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