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參數(shù)資料
| 型號： | MSM82C55A-2VJS |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 24 I/O, PIA-GENERAL PURPOSE, PQCC44 |
| 封裝： | 0.650 INCH, 1.27 MM PITCH, PLASTIC, QFJ-44 |
| 文件頁數(shù)： | 3/26頁 |
| 文件大小： | 173K |
| 代理商： | MSM82C55A-2VJS |
11/26
Semiconductor
MSM82C55A-2RS/GS/VJS
OPERATIONAL DESCRIPTION
Control Logic
Operations by addresses and control signals, e.g., read and write, etc. are as shown in the table
below:
Setting of Control Word
The control register is composed of 7-bit latch circuit and 1-bit flag as shown below.
D0
Definition of input/
output of low order
4 bits of port C.
0 = Output
1 = Input
Definition of input/
output of 8 bits of
port B.
0 = Output
1 = Input
Mode definition of
group B.
0 = Mode 0
1 = Mode 1
Definition of input/
output of high order
4 bits of port C.
0 = Output
1 = Input
Definition of input/
output of 8 bits of
port A.
0 = Output
1 = Input
Mode definition of group A.
D1
D2
D3
D4
D5
D6
D7
D6 D5
Mode
0
Mode 0
0
1
Mode 1
1
Mode 2
Control word Identification flag
When set to 0, it becomes
the control word for bit set/
reset.
Group A Control Bits
Group B Control Bits
Be sure to set 1 for the control word
to define a mode and input/output.
CS
Input
0
Port A
Data Bus
00
Control
1
0
Others
10
A0
0
1
WR
1
0
1
Operaiton
Operation
A1
Output
0
1
0
RD
00
11
0
10
01
0
00
10
1
10
00
1
1
Port B
Data Bus
Port C
Data Bus
Data Bus
Port A
Data Bus
Port B
Data Bus
Port C
Data Bus
Control Register
Illegal Condition
Data bus is in the high impedance status.
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相關代理商/技術參數(shù) |
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|---|---|
| MSM82C55A-2VJSDR1 | 制造商:ROHM Semiconductor 功能描述: |
| MSM82C59A-2GS | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:PROGRAMMABLE INTERRUPT CONTROLLER |
| MSM82C59A-2GS-K | 制造商:ROHM Semiconductor 功能描述: |
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| MSM82C59A-2JSDR1 | 制造商:ROHM Semiconductor 功能描述: |
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