參數(shù)資料
型號: MSM9005-01GS-BK
廠商: OKI ELECTRIC INDUSTRY CO LTD
元件分類: 顯示控制器
英文描述: 8 X 65 DOTS DOT MAT LCD DRVR AND DSPL CTLR, PQFP100
封裝: 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù): 5/30頁
文件大?。?/td> 295K
代理商: MSM9005-01GS-BK
Semiconductor
MSM9005-xx
13/30
FEDL9005-03
How to Write Command and Display Data
Input a command and display data into the SI pin sequentially from MSB in 8-bit units (MSB
first).
Setting CS pin at "H" level enables transfer of a command and display data.
Setting CS pin at a "L" level disables data transfer.
As shown in the figure below, data is shifted at the rising edge of the shift clock that is input
to the SHT pin. When 8 shift clocks are input, internal load signals are automatically generated
and a command or display data is loaded. It is unnecessary to provide load signals externally.
Loaded 8-bit data is recognized as a command if the C/D pin is set at "H" level, and is
recognized as display data if the C/D pin is set at "L" level on the rising edge of the 8th shift
clock input to the SHT pin.
Write timing is shown below.
(Example) Writing CG ROM address data The wait time of 21
× 1/fOSC is required
21 x 1/fOSC
tCH
Don't Care
00h
01h
02h
CS
C/D
SHT
Address
pointer
SI
11*000 00
MSB
LSB
WAIT
LPA command
(Sets address pointer
to 00h)
MSB
LSB
CG ROM code data
MSB
LSB
CG ROM code data at
the next address
C7 C6 C5 C4 C3 C2 C1 C0
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