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參數(shù)資料
| 型號： | MSP34X1G |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Multistandard Sound Processor Family with Virtual Dolby Surround |
| 中文描述： | 多標(biāo)準(zhǔn)聲音處理器系列與虛擬杜比環(huán)繞聲 |
| 文件頁數(shù)： | 76/104頁 |
| 文件大小： | 871K |
| 代理商： | MSP34X1G |
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MSP 34x1G
PRELIMINARY DATA SHEET
76
Micronas
CROSSTALK Specifications for AHVSUP = 8 V and 5 V
XTALK
Crosstalk Attenuation
PLCC68
PSDIP64
Input Level =
3 dB,
f
= 1 kHz, unused ana-
log inputs connected to
ground by Z < 1 k
between left and right channel within
SCART Input/Output pair (L
→
R, R
→
L)
SCn_IN
→
SCn_OUT
1)
PLCC68
PSDIP64
SC1_IN or SC2_IN
→
I
2
S Output
PLCC68
PSDIP64
SC3_IN
→
I
2
S Output
PLCC68
PSDIP64
I
2
S Input
→
SCn_OUT
1)
PLCC68
PSDIP64
80
80
80
80
80
80
80
80
dB
dB
dB
dB
dB
dB
dB
dB
unweighted
20 Hz...20 kHz
between left and right channel within
Main or AUX Output pair
I
2
S Input
→
DACp
1)
PLCC68
PSDIP64
80
75
dB
dB
unweighted
20 Hz...16 kHz
between SCART Input/Output pairs
D = disturbing program
O = observed program
D: MONO/SCn_IN
→
SCn_OUT
O: MONO/SCn_IN
→
SCn_OUT
1)
D: MONO/SCn_IN
→
SCn_OUT or unsel.
O: MONO/SCn_IN
→
I
S Output
D: MONO/SCn_IN
→
SCn_OUT
O: I
2
S Input
→
SCn_OUT
1)
D: MONO/SCn_IN
→
unselected
O: I
2
S Input
→
SC1_OUT
1)
PLCC68
PSDIP64
PLCC68
PSDIP64
PLCC68
PSDIP64
PLCC68
PSDIP64
100
100
100
95
100
100
100
100
dB
dB
dB
dB
dB
dB
dB
dB
unweighted
20 Hz...20 kHz
same signal source on left
and right disturbing chan-
nel, effect on each
observed output channel
Crosstalk between Main and AUX Output pairs
I
2
S Input
→
DACp
1)
PLCC68
PSDIP64
95
90
dB
dB
unweighted
20 Hz...16 kHz
same signal source on left
and right disturbing chan-
nel, effect on each
observed output channel
XTALK
Crosstalk from Main or AUX Output to SCART Output
and vice versa
D = disturbing program
O = observed program
D: MONO/SCn_IN/DSP
→
SCn_OUT
O: I
2
S Input
→
DACp
1)
D: MONO/SCn_IN/DSP
→
SCn_OUT
O: I
2
S Input
→
DACp
1)
D: I
2
S Input
→
DACp
O: MONO/SCn_IN
→
SCn_OUT
1)
D: I
2
S Input
→
DACM
O: I
2
S Input
→
SCn_OUT
1)
PLCC68
PSDIP64
PLCC68
PSDIP64
PLCC68
PSDIP64
PLCC68
PSDIP64
85
80
90
85
100
95
100
95
dB
dB
dB
dB
dB
dB
dB
dB
unweighted
20 Hz...20 kHz
same signal source on left
and right disturbing chan-
nel, effect on each
observed output channel
SCART output load resis-
tance 10 k
SCART output load resis-
tance 30 k
1)
“
n
”
means
“
1
”
,
“
2
”
,
“
3
”
, or
“
4
”
;
“
s
”
means
“
L
”
or
“
R
”
;
“
p
”
means
“
M
”
or
“
A
”
Symbol
Parameter
Pin Name
Min.
Typ.
Max.
Unit
Test Conditions
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參數(shù)描述 |
|---|---|
| MSP34X2G | 制造商:MICRONAS 制造商全稱:MICRONAS 功能描述:Multistandard Sound Processor Family with Dolby Surround Pro Logic |
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