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參數(shù)資料
| 型號： | MSP430C313IDLR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 3.3 MHz, RISC MICROCONTROLLER, PDSO56 |
| 封裝： | PLASTIC, SSOP-56 |
| 文件頁數(shù)： | 13/31頁 |
| 文件大小： | 346K |
| 代理商： | MSP430C313IDLR |
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MSP430x31x
MIXED SIGNAL MICROCONTROLLERS
SLAS165D FEBRUARY 1998 REVISED APRIL 2000
20
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
LCD
PARAMETER
TEST CONDITIONS
MIN
NOM
MAX
UNIT
V23
Analog voltage
Voltage at R23
VCC = 3 V/5 V
(VCC VSS)×
2/3+VSS
V
V13
Analog voltage
Voltage at R13
VCC = 3 V/5 V
(VCC VSS) ×
1/3+VSS
V
VO(HLCD)
Output 1 (HLCD)
I(HLCD) <= 10 nA
VCC 0.125
VCC
V
VO(LLCD)
Output 0 (LLCD)
I(LLCD) <= 10 nA
V
= 3 V/5 V
VSS
VSS+0.125
V
II(R13)
Input leakage
R13 = VCC /3
VCC = 3 V/5 V
±20
nA
II(R23)
Input leakage
(see Note 13)
R23 = 2 VCC /3
±20
nA
ro(R13) to S(XX)
Output (SXX)
I
=3
μA
V
= 3 V/5 V
33
k
Ω
ro(R23) to S(XX)
Output (SXX)
I(SXX) = 3 μA,
VCC = 3 V/5 V
33
k
Ω
NOTE 13: I(IRxx) is measured with no load on the segment or common LCD I/O pins.
comparator (Timer/Port)
PARAMETER
TEST CONDITIONS
MIN
NOM
MAX
UNIT
I
Comparator (timer/port)
CPON
1
VCC = 3 V
250
350
A
I(com)
Comparator (timer/port)
CPON = 1
VCC = 5 V
450
600
μA
Vref(com)
Internal reference voltage at () terminal
CPON = 1
VCC = 3 V/5 V
0.230
×VCC
0.25
×VCC
0.260
×VCC
V
Input hysteresis (comparator)
CPON = 1
VCC = 3 V
5
37
mV
Vhys(com)
Input hysteresis (comparator)
CPON = 1
VCC = 5 V
10
42
mV
RAM
PARAMETER
TEST CONDITIONS
MIN
NOM
MAX
UNIT
VRAMh
CPU halted (see Note 14)
1.8
V
NOTE 14: This parameter defines the minimum supply voltage when the data in the program memory RAM remains unchanged. No program
execution should happen during this supply voltage condition.
PUC/POR
PARAMETER
TEST CONDITIONS
MIN
NOM
MAX
UNIT
t(POR_delay)
150
250
μs
TA = 40°C
1.5
2.4
V
V(POR)
POR
TA = 25°C
V
= 3 V/5 V
1.2
2.1
V
(POR)
TA = 85°C
VCC = 3 V/5 V
0.9
1.8
V
V(min)
0
0.4
V
t(reset)
PUC/POR
Reset is accepted internally
2
μs
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