參數(shù)資料
型號(hào)： MSP430CG4618IZQW
廠(chǎng)商： TEXAS INSTRUMENTS INC
元件分類(lèi)： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 8 MHz, RISC MICROCONTROLLER, PBGA113
封裝： PLASTIC, BGA-113
文件頁(yè)數(shù)： 67/110頁(yè)
文件大?。?/td> 1605K
代理商： MSP430CG4618IZQW
MSP430xG461x
MIXED SIGNAL MICROCONTROLLER
SLAS508I APRIL 2006 REVISED MARCH 2011
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
NAME
NO.
PZ
NO.
ZQW
I/O
DESCRIPTION
DVCC1
1
A1
Digital supply voltage, positive terminal
P6.3/A3/OA1O
2
B1
I/O
General-purpose digital I/O / analog input a3—12-bit ADC / OA1 output
P6.4/A4/OA1I0
3
B2
I/O
General-purpose digital I/O / analog input a4—12-bit ADC / OA1 input multiplexer
on +terminal and terminal
P6.5/A5/OA2O
4
C2
I/O
General-purpose digital I/O / analog input a5—12-bit ADC / OA2 output
P6.6/A6/DAC0/OA2I0
5
C1
I/O
General-purpose digital I/O / analog input a6—12-bit ADC / DAC12.0 output / OA2
input multiplexer on +terminal and terminal
P6.7/A7/DAC1/SVSIN
6
C3
I/O
General-purpose digital I/O / analog input a7—12-bit ADC / DAC12.1 output /
analog input to brownout, supply voltage supervisor
VREF+
7
D2
O
Output of positive terminal of the reference voltage in the ADC
XIN
8
D1
I
Input port for crystal oscillator XT1. Standard or watch crystals can be connected.
XOUT
9
E1
O
Output terminal of crystal oscillator XT1
VeREF+/DAC0
10
E2
I/O
Input for an external reference voltage to the ADC / DAC12.0 output
VREF/VeREF
11
E4
I
Negative terminal for the ADC reference voltage for both sources, the internal
reference voltage, or an external applied reference voltage
P5.1/S0/A12/DAC1 (see Note 1)
12
F1
I/O
General-purpose digital I/O / LCD segment output 0 / analog input a12 12bit
ADC / DAC12.1 output
P5.0/S1/A13/OA1I1 (see Note 1)
13
F2
I/O
General-purpose digital I/O / LCD segment output 1 / analog input a13 12bit
ADC/OA1 input multiplexer on +terminal and terminal
P10.7/S2/A14/OA2I1 (see Note 1)
14
E5
I/O
General-purpose digital I/O / LCD segment output 2 / analog input a14 12bit
ADC/OA2 input multiplexer on +terminal and terminal
P10.6/S3/A15 (see Note 1)
15
G1
I/O
General-purpose digital I/O / LCD segment output 3 / analog input a15 12bit
ADC
P10.5/S4
16
G2
I/O
General-purpose digital I/O / LCD segment output 4
P10.4/S5
17
F4
I/O
General-purpose digital I/O / LCD segment output 5
P10.3/S6
18
H1
I/O
General-purpose digital I/O / LCD segment output 6
P10.2/S7
19
H2
I/O
General-purpose digital I/O / LCD segment output 7
P10.1/S8
20
F5
I/O
General-purpose digital I/O / LCD segment output 8
P10.0/S9
21
J1
I/O
General-purpose digital I/O / LCD segment output 9
P9.7/S10
22
J2
I/O
General-purpose digital I/O / LCD segment output 10
P9.6/S11
23
G4
I/O
General-purpose digital I/O / LCD segment output 11
P9.5/S12
24
K1
I/O
General-purpose digital I/O / LCD segment output 12
P9.4/S13
25
L1
I/O
General-purpose digital I/O / LCD segment output 13
P9.3/S14
26
M2
I/O
General-purpose digital I/O / LCD segment output 14
P9.2/S15
27
K2
I/O
General-purpose digital I/O / LCD segment output 15
P9.1/S16
28
L3
I/O
General-purpose digital I/O / LCD segment output 16
P9.0/S17
29
M3
I/O
General-purpose digital I/O / LCD segment output 17
P8.7/S18
30
H4
I/O
General-purpose digital I/O / LCD segment output 18
P8.6/S19
31
L4
I/O
General-purpose digital I/O / LCD segment output 19
P8.5/S20
32
M4
I/O
General-purpose digital I/O / LCD segment output 20
P8.4/S21
33
G5
I/O
General-purpose digital I/O / LCD segment output 21
P8.3/S22
34
L5
I/O
General-purpose digital I/O / LCD segment output 22
NOTES:
1. Segments S0 through S3 are disabled when the LCD charge pump feature is enabled (LCDCPEN = 1) and cannot be used together
with the LCD charge pump. In addition, when using segments S0 through S3 with an external LCD voltage supply, VLCD ≤ AVCC.
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