參數(shù)資料
型號(hào)： MSP430F1121IDWR
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 8 MHz, RISC MICROCONTROLLER, PDSO20
封裝： PLASTIC, SO-20
文件頁數(shù)： 13/43頁
文件大小： 869K
代理商： MSP430F1121IDWR
MSP430C11x1, MSP430F11x1A
MIXED SIGNAL MICROCONTROLLER
SLAS241I SEPTEMBER 1999 REVISED DECEMBER 2008
20
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
Comparator_A (see Note 1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
I
CAON=1
CARSEL=0
CAREF=0
VCC = 2.2 V
25
40
μA
I(DD)
CAON=1, CARSEL=0, CAREF=0
VCC = 3 V
45
60
μA
I
CAON=1, CARSEL=0,
CAREF 1/2/3 no load at
VCC = 2.2 V
30
50
μA
I(Refladder/RefDiode)
CAREF=1/2/3, no load at
P2.3/CA0/TA1 and P2.4/CA1/TA2
VCC = 3 V
45
71
μA
V(IC)
Common-mode input
voltage
CAON =1
VCC = 2.2 V/3 V
0
VCC1
V
V(Ref025)
Voltage @ 0.25 V
CC
node
V
CC
PCA0=1, CARSEL=1, CAREF=1,
No load at P2.3/CA0/TA1 and
P2.4/CA1/TA2
VCC = 2.2 V/3 V
0.23
0.24
0.25
V(Ref050)
Voltage @ 0.5V
CC
node
V
CC
PCA0=1, CARSEL=1, CAREF=2,
No load at P2.3/CA0/TA1 and
P2.4/CA1/TA2
VCC = 2.2 V/3 V
0.47
0.48
0.5
V
PCA0=1, CARSEL=1, CAREF=3,
No load at P2 3/CA0/TA1 and
VCC = 2.2 V
390
480
540
mV
V(RefVT)
No load at P2.3/CA0/TA1 and
P2.4/CA1/TA2, TA = 85°C
VCC = 3 V
400
490
550
mV
V(offset)
Offset voltage
See Note 2
VCC = 2.2 V/3 V
30
mV
Vhys
Input hysteresis
CAON=1
VCC = 2.2 V/3 V
0
0.7
1.4
mV
TA = 25°C, Overdrive 10 mV,
VCC = 2.2 V
160
210
300
ns
t
TA = 25 C, Overdrive 10 mV,
Without filter: CAF=0
VCC = 3 V
90
150
240
ns
t(response LH)
TA = 25°C, Overdrive 10 mV,
VCC = 2.2 V
1.4
1.9
3.4
μs
TA = 25 C, Overdrive 10 mV,
With filter: CAF=1
VCC = 3 V
0.9
1.5
2.6
μs
TA = 25°C, Overdrive 10 mV,
VCC = 2.2 V
130
210
300
ns
t
TA = 25 C, Overdrive 10 mV,
Without filter: CAF=0
VCC = 3 V
80
150
240
ns
t(response HL)
TA = 25°C, Overdrive 10 mV,
VCC = 2.2 V
1.4
1.9
3.4
μs
TA = 25 C, Overdrive 10 mV,
With filter: CAF=1
VCC = 3 V
0.9
1.5
2.6
μs
NOTES:
1. The leakage current for the Comparator_A terminals is identical to Ilkg(Px.x) specification.
2. The input offset voltage can be cancelled by using the CAEX bit to invert the Comparator_A inputs on successive measurements.
The two successive measurements are then summed together.
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