參數(shù)資料
型號: MSP430F123IRHBR
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 8 MHz, RISC MICROCONTROLLER, PQCC32
封裝: GREEN, PLASTIC, QFN-32
文件頁數(shù): 40/42頁
文件大?。?/td> 788K
代理商: MSP430F123IRHBR
MSP430x12x
MIXED SIGNAL MICROCONTROLLER
SLAS312C JULY 2001 REVISED SEPTEMBER 2004
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
special function registers
Most interrupt and module enable bits are collected into the lowest address space. Special function register bits
that are not allocated to a functional purpose are not physically present in the device. Simple software access
is provided with this arrangement.
interrupt enable 1 and 2
76
54
0
OFIE
WDTIE
32
1
rw-0
Address
0h
NMIIE
ACCVIE
rw-0
WDTIE:
Watchdog-timer interrupt enable. Inactive if watchdog mode is selected. Active if watchdog
timer is configured in interval timer mode.
OFIE:
Oscillator-fault-interrupt enable
NMIIE:
Nonmaskable-interrupt enable
ACCVIE:
Flash access violation interrupt enable
76
54
0
32
1
Address
01h
UTXIE0
URXIE0
rw-0
URXIE0:
USART0: UART and SPI receive-interrupt enable
UTXIE0:
USART0: UART and SPI transmit-interrupt enable
interrupt flag register 1 and 2
76
54
0
OFIFG
WDTIFG
32
1
rw-0
rw-1
rw-(0)
Address
02h
NMIIFG
WDTIFG:
Set on watchdog timer overflow (in watchdog mode) or security key violation. Reset on VCC
power up or a reset condition at the RST/NMI pin in reset mode.
OFIFG:
Flag set on oscillator fault
NMIIFG:
Set via RST/NMI pin
76
54
0
32
1
Address
03h
UTXIFG0
URXIFG0
rw-0
URXIFG0:
USART0: UART and SPI receive flag
UTXIFG0:
USART0: UART and SPI transmit flag
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