參數(shù)資料
型號: MSP430F2013IPWR
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PDSO14
封裝: GREEN, PLASTIC, TSSOP-14
文件頁數(shù): 60/92頁
文件大小: 1672K
代理商: MSP430F2013IPWR
MSP430F20x3
MSP430F20x2
MSP430F20x1
SLAS491H
– AUGUST 2005 – REVISED AUGUST 2011
Table 25. Port P1 (P1.4 to P1.7) Pin Functions, MSP430F20x2
CONTROL BITS / SIGNALS(1)(2)
PIN NAME (P1.x)
x
FUNCTION
P1DIR.x
P1SEL.x
USIP.x
ADC10AE.x
INCHx
JTAG Mode
P1.4(3) input/output
0/1
0
N/A
0
N/A
0
N/A
0
1
N/A
0
N/A
0
SMCLK
1
N/A
0
N/A
0
P1.4/SMCLK/A4/
4
VREF+/VeREF+/TCK
A4(4)
X
N/A
1
4
0
VREF+/VeREF+(4)(5)
X
N/A
1
N/A
0
TCK(6)
X
N/A
X
1
P1.5(3) input/output
0/1
0
N/A
0
N/A
0
1
0
N/A
0
Timer_A2.TA0
1
0
N/A
0
P1.5/TA0/SCLK/A5/TMS
5
SCLK
X
1
0
N/A
0
A5(4)
X
1
5
0
TMS(6)
X
1
P1.6(3) input/output
0/1
0
N/A
0
Timer_A2.CCI1B
0
1
0
N/A
0
Timer_A2.TA1
1
0
N/A
0
P1.6/TA1/SDO/SCL/A6/TDI
6
SDO (SPI) / SCL (I2C)
X
1
0
N/A
0
A6(4)
X
1
6
0
TDI(6)
X
1
P1.7(3) input/output
0/1
0
N/A
0
N/A
0
1
0
N/A
0
DVSS
1
0
N/A
0
P1.7/SDI/SDA/A7/TDO/TDI
7
SDI (SPI) / SDA (I2C)
X
1
0
N/A
0
A7(4)
X
1
7
0
TDO/TDI(6)(7)
X
1
(1)
X = Don
't care
(2)
N/A = Not available or not applicable
(3)
Default after reset (PUC/POR)
(4)
Setting the ADC10AE.x bit disables the output driver as well as the input Schmitt trigger to prevent parasitic cross currents when
applying analog signals.
(5)
The reference voltage is output if bit REFOUT in register ADC10CTL0 is set. An applied voltage is used as positive reference if bits
SREF0/1 in register ADC10CTL0 are set to 10 or 11.
(6)
In JTAG mode the internal pullup/down resistors are disabled.
(7)
Function controlled by JTAG.
Copyright
2005–2011, Texas Instruments Incorporated
63
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