參數(shù)資料
型號(hào): MSP430F2131TRGE
廠商: TEXAS INSTRUMENTS INC
元件分類(lèi): 微控制器/微處理器
英文描述: 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQCC24
封裝: PLASTIC, QFN-24
文件頁(yè)數(shù): 46/95頁(yè)
文件大?。?/td> 1832K
代理商: MSP430F2131TRGE
MSP430x23x, MSP430x24x(1), MSP430x2410
MIXED SIGNAL MICROCONTROLLER
SLAS547D -- JUNE 2007 -- REVISED APRIL 2010
50
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
crystal oscillator, LFXT1, low-frequency modes (see Note 4)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
fLFXT1,LF
LFXT1 oscillator crystal
frequency, LF mode 0, 1
XTS = 0, LFXT1Sx = 0 or 1
1.8 V to 3.6 V
32,768
Hz
fLFXT1,LF,logic
LFXT1 oscillator logic level
square wave input frequency,
LF mode
XTS = 0, LFXT1Sx = 3,
XCAPx = 0
1.8 V to 3.6 V
10,000
32,768
50,000
Hz
OA
Oscillation allowance for
XTS = 0, LFXT1Sx = 0,
fLFXT1,LF = 32,768 kHz,
CL,eff =6pF
500
k
OALF
Oscillation allowance for
LF crystals
XTS = 0, LFXT1Sx = 0,
fLFXT1,LF = 32,768 kHz,
CL,eff =12pF
200
k
XTS = 0, XCAPx = 0
1
C
Integrated effective load
capacitance LF mode
XTS = 0, XCAPx = 1
5.5
pF
CL,eff
capacitance, LF mode
(see Note 1)
XTS = 0, XCAPx = 2
8.5
pF
(see Note 1)
XTS = 0, XCAPx = 3
11
Duty cycle
LF mode
XTS = 0, Measured at P1.4/ACLK,
fLFXT1,LF = 32,768 Hz
2.2 V/3 V
30
50
70
%
fFault,LF
Oscillator fault frequency,
LF mode (see Note 3)
XTS = 0, LFXT1Sx = 3,
XCAPx = 0 (see Notes 2)
2.2 V/3 V
10
10,000
Hz
NOTES: 1. Includes parasitic bond and package capacitance (approximately 2 pF per pin).
Since the PCB adds additional capacitance it is recommended to verify the correct load by measuring the ACLK frequency. For a
correct setup the effective load capacitance should always match the specification of the used crystal.
2. Measured with logic level input frequency but also applies to operation with crystals.
3. Frequencies below the MIN specification will set the fault flag, frequencies above the MAX specification will not set the fault flag.
Frequencies in between might set the flag.
4. To improve EMI on the LFXT1 oscillator the following guidelines should be observed.
-- Keep the trace between the device and the crystal as short as possible.
-- Design a good ground plane around the oscillator pins.
-- Prevent crosstalk from other clock or data lines into oscillator pins XIN and XOUT.
-- Avoid running PCB traces underneath or adjacent to the XIN and XOUT pins.
-- Use assembly materials and praxis to avoid any parasitic load on the oscillator XIN and XOUT pins.
-- If conformal coating is used, ensure that it does not induce capacitive/resistive leakage between the oscillator pins.
-- Do not route the XOUT line to the JTAG header to support the serial programming adapter as shown in other
documentation. This signal is no longer required for the serial programming adapter.
5. Applies only if using an external logic-level clock source. Not applicable when using a crystal or resonator.
internal very-low-power low-frequency oscillator (VLO)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
fVLO
VLO frequency
2.2 V/3 V
4
12
20
kHz
dfVLO/dT
VLO frequency temperature drift
SeeNote6
2.2 V/3 V
0.5
%/°C
dfVLO/dVCC
VLO frequency supply voltage drift
SeeNote7
1.8 V to 3.6 V
4
%/V
NOTES: 6. Calculated using the box method:
I version: (MAX(--40 to 85_C) -- MIN(--40 to 85_C))/MIN(--40 to 85_C)/(85_C-- (--40_C))
T version: (MAX(--40 to 105_C) -- MIN(--40 to 105_C))/MIN(--40 to 105_C)/(105_C -- (--40_C))
7. Calculated using the box method: (MAX(1.8 to 3.6 V) -- MIN(1.8 to 3.6 V))/MIN(1.8 to 3.6 V)/(3.6 V -- 1.8 V)
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