參數(shù)資料
型號: MSP430F2232TDA
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PDSO38
封裝: GREEN, PLASTIC, TSSOP-38
文件頁數(shù): 14/94頁
文件大?。?/td> 1583K
代理商: MSP430F2232TDA
MSP430F22x2
MSP430F22x4
SLAS504E
– JULY 2006 – REVISED MARCH 2011
Timer_B3
Timer_B3 is a 16-bit timer/counter with three capture/compare registers. Timer_B3 can support multiple
capture/compares, PWM outputs, and interval timing. Timer_B3 also has extensive interrupt capabilities.
Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare
registers.
Table 16. Timer_B3 Signal Connections
INPUT PIN NUMBER
DEVICE
MODULE
OUTPUT PIN NUMBER
MODULE
INPUT
OUTPUT
BLOCK
DA
RHA
YFF
DA
RHA
YFF
SIGNAL
NAME
SIGNAL
24 - P4.7
22 - P4.7
F5 - P4.7
TBCLK
Timer
NA
ACLK
SMCLK
24 - P4.7
22 - P4.7
F5 - P4.7
TBCLK
INCLK
17 - P4.0
15 - P4.0
D6 - P4.0
TB0
CCI0A
CCR0
TB0
17 - P4.0
15 - P4.0
D6 - P4.0
20 - P4.3
18 - P4.3
E7 - P4.3
TB0
CCI0B
20 - P4.3
18 - P4.3
E7 - P4.3
VSS
GND
VCC
18 - P4.1
16 - P4.1
D7 - P4.1
TB1
CCI1A
CCR1
TB1
18 - P4.1
16 - P4.1
D7 - P4.1
21 - P4.4
19 - P4.4
F7 - P4.4
TB1
CCI1B
21 - P4.4
19 - P4.4
F7 - P4.4
VSS
GND
VCC
19 - P4.2
17 - P4.2
E6 - P4.2
TB2
CCI2A
CCR2
TB2
19 - P4.2
17 - P4.2
E6 - P4.2
ACLK
CCI2B
22 - P4.5
20 - P4.5
F6 - P4.5
(internal)
VSS
GND
VCC
Universal Serial Communications Interface (USCI)
The USCI module is used for serial data communication. The USCI module supports synchronous
communication protocols like SPI (3 or 4 pin), I2C and asynchronous communication protocols such as UART,
enhanced UART with automatic baudrate detection (LIN), and IrDA.
USCI_A0 provides support for SPI (3 or 4 pin), UART, enhanced UART, and IrDA.
USCI_B0 provides support for SPI (3 or 4 pin) and I2C.
ADC10
The ADC10 module supports fast, 10-bit analog-to-digital conversions. The module implements a 10-bit SAR
core, sample select control, reference generator and data transfer controller, or DTC, for automatic conversion
result handling allowing ADC samples to be converted and stored without any CPU intervention.
Copyright
2006–2011, Texas Instruments Incorporated
21
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