SLAS614D
– SEPTEMBER 2008 – REVISED MAY 2011
Crystal Oscillator (LFXT1) Low-Frequency Modes
– Electrical Characteristics
(1) (2)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
VCC
MIN
TYP
MAX
UNIT
LFXT1 oscillator
–55°C to
fLFXT1,LF
crystal frequency, LF
XTS = 0, LFXT1Sx = 0 or 1
1.8 V to 3.6 V
32,768
Hz
105
°C
mode 0, 1
LFXT1 oscillator
fLFXT1,LF,
logic-level
–55°C to
XTS = 0, LFXT1Sx = 3
1.8 V to 3.6 V
10,000
32,768
50,000
Hz
logic
square-wave input
125
°C
frequency, LF mode
XTS = 0, LFXT1Sx = 0;
–55°C to
fLFXT1,LF = 32,768 kHz,
500
105
°C
CL,eff = 6 pF
Oscillation allowance
OALF
k
for LF crystals
XTS = 0, LFXT1Sx = 0;
–55°C to
fLFXT1,LF = 32,768 kHz,
200
105
°C
CL,eff = 12 pF
XCAPx = 0
1
Integrated effective
XCAPx = 1
5.5
–55°C to
CL,eff
load capacitance,
XTS = 0
pF
105
°C
XCAPx = 2
8.5
LF mode(3)
XCAPx = 3
11
XTS = 0, Measured at
Duty
–55°C to
LF mode
P1.4/ACLK,
2.2 V/3 V
30
50
70
%
Cycle
125
°C
fLFXT1,LF = 32,768 Hz
Oscillator fault
–55°C to
fFault,LF
frequency threshold,
XTS = 0, LFXT1Sx = 3(5)
2.2 V/3 V
10
10,000
Hz
125
°C
LF mode (4)
(1)
To improve EMI on the LFXT1 oscillator the following guidelines should be observed:
(a) Keep as short of a trace as possible between the device and the crystal.
(b) Design a good ground plane around the oscillator pins.
(c) Prevent crosstalk from other clock or data lines into oscillator pins XIN and XOUT.
(d) Avoid running PCB traces underneath or adjacent to the XIN and XOUT pins.
(e) Use assembly materials and praxis to avoid any parasitic load on the oscillator XIN and XOUT pins.
(f) If conformal coating is used, ensure that it does not induce capacitive/resistive leakage between the oscillator pins.
(g) Do not route the XOUT line to the JTAG header to support the serial programming adapter as shown in other documentation. This
signal is no longer required for the serial programming adapter.
(2)
Use of the LFXT1 Crystal Oscillator with TA > 105°C is not guaranteed. It is recommended that an external digital clock source or the
internal DCO is used to provide clocking.
(3)
Includes parasitic bond and package capacitance (approximately 2 pF per pin). Since the PCB adds additional capacitance it is
recommended to verify the correct load by measuring the ACLK frequency. For a correct setup the effective load capacitance should
always match the specification of the used crystal.
(4)
Frequencies below the MIN specification set the fault flag, frequencies above the MAX specification do not set the fault flag.
Frequencies in between might set the flag.
(5)
Measured with logic-level input frequency, but also applies to operation with crystals with TA < 105°C.
Internal Very-Low-Power, Low-Frequency Oscillator (VLO)
– Electrical Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
TEST
PARAMETER
TA
VCC
MIN
TYP
MAX
UNIT
CONDITIONS
–55°C to 85°C
2.2 V/3 V
4
12
20
fVLO
VLO frequency
kHz
125
°C
2.2 V/3 V
22
dfVLO/dT
VLO frequency temperature drift
(1)
–55°C to 125°C
2.2 V/3 V
0.5
%/
°C
1.8 V
–
dfVLO/dVCC VLO frequency supply voltage drift
(2)
25
°C
4
%/V
3.6V
(1)
Calculated using the box method:
I Version: [MAX(
–55...85°C) – MIN(–55...85°C)]/MIN(55–...85°C)/[85°C – (–55°C)]
T Version: [MAX(
–55...125°C) – MIN(–55...125°C)]/MIN(–55...125°C)/[125°C – (–55°C)]
(2)
Calculated using the box method: [MAX(1.8...3.6 V)
– MIN(1.8...3.6 V)]/MIN(1.8...3.6 V)/(3.6 V – 1.8 V)
Copyright
2008–2011, Texas Instruments Incorporated
33