參數(shù)資料
型號(hào): MSP430F248TPM
廠商: TEXAS INSTRUMENTS INC
元件分類(lèi): 微控制器/微處理器
英文描述: 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQFP64
封裝: GREEN, PLASTIC, LQFP-64
文件頁(yè)數(shù): 24/91頁(yè)
文件大?。?/td> 1246K
代理商: MSP430F248TPM
4.15 MHz
12 MHz
16 MHz
1.8 V
2.2 V
2.7 V
3.3 V
3.6 V
Supply Voltage V
S
y
s
te
m
F
re
q
u
e
n
c
y
M
H
z
Supply voltage range
during flash memory
programming
Supply voltage range
during program execution
Legend :
7.5 MHz
MSP430F23x
MSP430F24x(1)
MSP430F2410
SLAS547H
– JUNE 2007 – REVISED AUGUST 2011
Absolute Maximum Ratings
(1)
Voltage applied at VCC to VSS
-0.3 V to 4.1 V
Voltage applied to any pin (2)
-0.3 V to VCC + 0.3 V
Diode current at any device terminal
±2 mA
Unprogrammed device
-55
°C to 150°C
Storage temperature, Tstg
(3)
Programmed device
-55
°C to 150°C
(1)
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditionsis not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltages referenced to VSS. The JTAG fuse-blow voltage, VFB, is allowed to exceed the absolute maximum rating. The voltage is
applied to the TEST pin when blowing the JTAG fuse.
(3)
Higher temperature may be applied during board soldering process according to the current JEDEC J-STD-020 specification with peak
reflow temperatures not higher than classified on the device label on the shipping boxes or reels.
Recommended Operating Conditions
(1) (2)
MIN
NOM
MAX
UNIT
During program
1.8
3.6
V
execution
VCC
Supply voltage(3)
AVCC = DVCC = VCC
During program/erase
2.2
3.6
V
flash memory
VSS
Supply voltage
AVSS = DVSS = VSS
0
V
I version
-40
85
TA
Operating free-air temperature
°C
T version
-40
105
VCC = 1.8 V, Duty cycle = 50% ±10%
dc
4.15
Processor frequency
fSYSTEM
(maximum MCLK frequency)(1)(2)
VCC = 2.7 V, Duty cycle = 50% ±10%
dc
12
MHz
(see Figure 1)
VCC ≥ 3.3 V, Duty cycle = 50% ±10%
dc
16
(1)
The MSP430 CPU is clocked directly with MCLK. Both the high and low phase of MCLK must not exceed the pulse width of the
specified maximum frequency.
(2)
Modules might have a different maximum input clock specification. See the specification of the respective module in this data sheet.
(3)
It is recommended to power AVCC and DVCC from the same source. A maximum difference of 0.3 V between AVCC and DVCC can be
tolerated during power-up.
NOTE: Minimum processor frequency is defined by system clock. Flash program or erase operations require a minimum VCC
of 2.2 V.
Figure 1. Operating Area
30
Copyright
2007–2011, Texas Instruments Incorporated
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