參數(shù)資料
型號： MSP430F47173IPZ
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQFP100
封裝： PLASTIC, LQFP-100
文件頁數(shù)： 54/87頁
文件大小： 1538K
代理商： MSP430F47173IPZ
MSP430F471x3, MSP430F471x6, MSP430F471x7
MIXED SIGNAL MICROCONTROLLER
SLAS626C -- OCTOBER 2008 -- REVISED MARCH 2011
58
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
flash memory
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
VCC(PGM/
ERASE)
Program and erase supply voltage
2.2
3.6
V
fFTG
Flash timing generator frequency
257
476
kHz
IPGM
Supply current from VCC during program
2.2 V/3.6 V
3
5
mA
IERASE
Supply current from VCC during erase
2.2 V/3.6 V
3
7
mA
tCPT
Cumulative program time (see Note 1)
2.2 V/3.6 V
10
ms
tCMErase
Cumulative mass erase time
2.2 V/3.6 V
20
ms
Program/Erase endurance
104
105
cycles
tRetention
Data retention duration
TJ =25C
100
years
tWord
Word or byte program time
30
tFTG
tBlock, 0
Block program time for 1st byte or word
25
tFTG
tBlock, 1-63
Block program time for each additional byte or word
see Note 2
18
tFTG
tBlock, End
Block program end-sequence wait time
seeNote2
6
tFTG
tMass Erase
Mass erase time
10593
tFTG
tSeg Erase
Segment erase time
4819
tFTG
fMCLK,MGR
MCLK frequency in marginal read mode
(FCTL4.MGR0 = 1 or FCTL4.MGR1 = 1)
0
1
MHz
NOTES: 1. The cumulative program time must not be exceeded when writing to a 64-byte flash block. This parameter applies to all programming
methods: individual word/byte write and block write modes.
2. These values are hardwired into the Flash Controller’s state machine (tFTG =1/fFTG).
RAM
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
V(RAMh)
RAM retention supply voltage (see Note 1)
CPU halted
1.6
V
NOTE 1: This parameter defines the minimum supply voltage VCC when the data in RAM remains unchanged. No program execution should
happen during this supply voltage condition.
JTAG interface
PARAMETER
TEST
CONDITIONS
VCC
MIN
TYP
MAX
UNIT
f
TCK inp t freq enc
See Note 1
2.2 V
0
5
MHz
fTCK
TCK input frequency
See Note 1
3V
0
10
MHz
RInternal
Internal pullup resistance on TMS, TCK, TDI/TCLK
SeeNote2
2.2 V/ 3 V
25
40
90
k
NOTES: 1. fTCK may be restricted to meet the timing requirements of the module selected.
2. TMS, TDI/TCLK, and TCK pull-up resistors are implemented in all versions.
JTAG fuse (see Note 1)
PARAMETER
TEST
CONDITIONS
VCC
MIN
NOM
MAX
UNIT
VCC(FB)
Supply voltage during fuse-blow condition
TA =25C
2.5
V
VFB
Voltage level on TDI/TCLK for fuse-blow: F versions
6
7
V
IFB
Supply current into TDI/TCLK during fuse blow
100
mA
tFB
Time to blow fuse
1
ms
NOTES: 1. Once the fuse is blown, no further access to the MSP430 JTAG/test and emulation features is possible. The JTAG block is switched
to bypass mode.
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