參數(shù)資料
型號: MSP430F47197IPZR
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQFP100
封裝: GREEN, PLASTIC, QFP-100
文件頁數(shù): 60/87頁
文件大?。?/td> 1538K
代理商: MSP430F47197IPZR
MSP430F471x3, MSP430F471x6, MSP430F471x7
MIXED SIGNAL MICROCONTROLLER
SLAS626C -- OCTOBER 2008 -- REVISED MARCH 2011
63
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Port P2 (P2.0 to P2.5) pin functions
PIN NAME (P2 X)
X
FUNCTION
CONTROL BITS / SIGNALS
PIN NAME (P2.X)
X
FUNCTION
P2DIR.x
P2SEL.x
CAPD.x
P2.0/
4
P2.0 (I/O)
I: 0, O: 1
0
/
UCB1STE/UCA1CLK
UCB1STE/UCA1CLK (see Note 1, 2, 3)
X
1
0
Input buffer disabled (see Note 6)
X
1
P2.1/
4
P2.1 (I/O)
I: 0, O: 1
0
/
UCB1SIMO/UCB1SDA
UCB1SIMO/UCB1SDA (see Note 1, 2, 4)
X
1
0
Input buffer disabled (see Note 6)
X
1
P2.2/
4
P2.2 (I/O)
I: 0, O: 1
0
/
UCB1SOMI/UCB1SCL
UCB1SOMI/UCB1SCL (see Note 1, 2, 4)
X
1
0
Input buffer disabled (see Note 6)
X
1
P2.3/
4
P2.3 (I/O)
I: 0, O: 1
0
/
UCB1CLK/UCA1STE
UCB1CLK/UCA1STE (see Note 1, 2, 5)
X
1
0
Input buffer disabled (see Note 6)
X
1
P2.4/
4
P2.4 (I/O)
I: 0, O: 1
0
/
UCA0TXD/UCA0SIMO
UCA0TXD/UCA0SIMO (see Note 1, 2)
X
1
0
Input buffer disabled (see Note 6)
X
1
P2.5/
5
P2.5 (I/O)
I: 0, O: 1
0
/
UCA0RXD/UCA0SOMI
UCA0RXD/UCA0SOMI (see Note 1, 2)
X
1
0
Input buffer disabled (see Note 6)
X
1
NOTES: 1. X: Don’t care
2. The pin direction is controlled by the USCI module.
3. UCA1CLK function takes precedence over UCB1STE function. If the pin is required as UCA1CLK input or output USCI_B1 will be
forced to 3-wire SPI mode even if 4-wire SPI mode is selected.
4. In case the I2C functionality is selected the output drives only the logical 0 to VSS level.
5. UCB1CLK function takes precedence over UCA1STE function. If the pin is required as UCB1CLK input or output USCI_A1 will be
forced to 3-wire SPI mode even if 4-wire SPI mode is selected.
6. Setting the CAPD.x bit disables the output driver as well as the input schmitt trigger to prevent parasitic cross currents when applying
analog signals.
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