參數(shù)資料
型號: MSP430F5132IRHAT
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, RISC MICROCONTROLLER, PQCC40
封裝: PLASTIC, MO-220VJJD2, VQFN-40
文件頁數(shù): 8/61頁
文件大?。?/td> 915K
代理商: MSP430F5132IRHAT
PRODUCTPREVIEW
MSP430F51x1
MSP430F51x2
SLAS619 – AUGUST 2010
www.ti.com
Oscillator and System Clock
The clock system (Unified Clock System, UCS) module that includes support for a 32-kHz watch crystal oscillator
and high-frequency crystal oscillator, an internal very-low-power low-frequency oscillator (VLO), an internal
trimmed low-frequency oscillator (REFO), and an integrated internal digitally-controlled oscillator (DCO). The
UCS module is designed to meet the requirements of both low system cost and low power consumption. The
UCS module features digital frequency locked loop (FLL) hardware that, in conjunction with a digital modulator,
stabilizes the DCO frequency to a programmable multiple of the watch crystal frequency. The internal DCO
provides a fast turn-on clock source and stabilizes in less than 5 s. The UCS module provides the following
clock signals:
Auxiliary clock (ACLK), sourced from a 32-kHz watch crystal or high-frequency crystal (LFXT1), the internal
low-frequency oscillator (VLO), the trimmed low-frequency oscillator (REFO), or the internal digitally-controlled
oscillator DCO.
Main clock (MCLK), the system clock used by the CPU. MCLK can be sourced by same sources made
available to ACLK.
Sub-Main clock (SMCLK), the subsystem clock used by the peripheral modules. SMCLK can be sourced by
same sources made available to ACLK.
ACLK/n, the buffered output of ACLK, ACLK/2, ACLK/4, ACLK/8, ACLK/16, ACLK/32.
Power Management Module (PMM)
The PMM includes an integrated voltage regulator that supplies the core voltage to the device and contains
programmable output levels to provide for power optimization. The PMM also includes supply voltage supervisor
(SVS) and supply voltage monitoring (SVM) circuitry, as well as brownout protection. The brownout circuit is
implemented to provide the proper internal reset signal to the device during power-on and power-off. The
SVS/SVM circuitry detects if the supply voltage drops below a user-selectable level and supports both supply
voltage supervision (the device is automatically reset) and supply voltage monitoring (SVM, the device is not
automatically reset). SVS and SVM circuitry is available on the primary supply and core supply.
Hardware Multiplier
The multiplication operation is supported by a dedicated peripheral module. The module performs operations with
32-bit, 24-bit, 16-bit, and 8-bit operands. The module is capable of supporting signed and unsigned multiplication
as well as signed and unsigned multiply and accumulate operations
Watchdog Timer (WDT_A)
The primary function of the watchdog timer (WDT_A) module is to perform a controlled system restart after a
software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog
function is not needed in an application, the module can be configured as an interval timer and can generate
interrupts at selected time intervals.
System Module (SYS)
The SYS module handles many of the system functions within the device. These include power-on reset and
power-up clear handling, NMI source selection and management, reset interrupt vector generators, bootstrap
loader entry mechanisms, and configuration management (device descriptors). It also includes a data exchange
mechanism via JTAG called a JTAG mailbox that can be used in the application.
16
Copyright 2010, Texas Instruments Incorporated
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