參數(shù)資料
型號: MSP430F5152IRSBT
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, RISC MICROCONTROLLER, PQCC40
封裝: GREEN, PLASTIC, WQFN-40
文件頁數(shù): 8/102頁
文件大?。?/td> 1183K
代理商: MSP430F5152IRSBT
MSP430F51x1
MSP430F51x2
SLAS619A
– AUGUST 2010 – REVISED AUGUST 2011
Flash Memory
The flash memory can be programmed via the JTAG port, Spy-Bi-Wire (SBW), the BSL, or in-system by the
CPU. The CPU can perform single-byte, single-word, and long-word writes to the flash memory. Features of the
flash memory include:
Flash memory has n segments of main memory and four segments of information memory (A to D) of
128 bytes each. Each segment in main memory is 512 bytes in size.
Segments 0 to n may be erased in one step, or each segment may be individually erased.
Segments A to D can be erased individually, or as a group with segments 0 to n. Segments A to D are also
called information memory.
Segment A can be locked separately.
RAM Memory
The RAM memory is made up of n sectors. Each sector can be completely powered down to save leakage;
however, all data is lost. Features of the RAM memory include:
RAM memory has n sectors. The size of a sector can be found in the Memory Organization section.
Each sector 0 to n can be complete disabled; however, data retention is lost.
Each sector 0 to n automatically enters low-power retention mode when possible.
Peripherals
Peripherals are connected to the CPU through data, address, and control buses and can be handled using all
instructions. For complete module descriptions, see the MSP430x5xx/MSP430x6xx Family User
's Guide
Digital I/O
There are up to three 8-bit I/O ports implemented. Port PJ contains seven individual I/O pins, common to all
devices.
All individual I/O bits are independently programmable.
Any combination of input, output, and interrupt conditions is possible.
Programmable pullup or pulldown on all ports.
Programmable drive strength on all ports.
Edge-selectable interrupt input capability for all the eight bits of ports P1 and P2.
Read/write access to port-control registers is supported by all instructions.
Ports can be accessed byte-wise. P1 and P2 can also be accessed word-wise (PA).
The input and output voltage levels of the pins supplied by DVIO (see Table 3) are defined by the voltage
supplied by DVIO (up to 5V).
Copyright
2010–2011, Texas Instruments Incorporated
13
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