參數(shù)資料
型號: MSP430F5172IRHAT
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, RISC MICROCONTROLLER, PQCC40
封裝: PLASTIC, MO-220VJJD-2, VQFN-40
文件頁數(shù): 18/61頁
文件大小: 913K
代理商: MSP430F5172IRHAT
PRODUCTPREVIEW
MSP430F51x1
MSP430F51x2
www.ti.com
SLAS619 – AUGUST 2010
Table 23. SYS Registers (Base Address: 0180h)
REGISTER DESCRIPTION
REGISTER
OFFSET
System control
SYSCTL
00h
Bootstrap loader configuration area
SYSBSLC
02h
JTAG mailbox control
SYSJMBC
06h
JTAG mailbox input 0
SYSJMBI0
08h
JTAG mailbox input 1
SYSJMBI1
0Ah
JTAG mailbox output 0
SYSJMBO0
0Ch
JTAG mailbox output 1
SYSJMBO1
0Eh
Bus Error vector generator
SYSBERRIV
18h
User NMI vector generator
SYSUNIV
1Ah
System NMI vector generator
SYSSNIV
1Ch
Reset vector generator
SYSRSTIV
1Eh
Table 24. Shared Reference Registers (Base Address: 01B0h)
REGISTER DESCRIPTION
REGISTER
OFFSET
Shared reference control
REFCTL
00h
Table 25. Port Mapping Controller (Base Address: 01C0h)
REGISTER DESCRIPTION
REGISTER
OFFSET
Port mapping password register
PMAPPWD
00h
Port mapping control register
PMAPCTL
02h
Table 26. Port Mapper for Port P1 (Base Address: 01C8h)
REGISTER DESCRIPTION
REGISTER
OFFSET
Port P1.0 mapping register
P1MAP0
00h
Port P1.1 mapping register
P1MAP1
01h
Port P1.2 mapping register
P1MAP2
02h
Port P1.3 mapping register
P1MAP3
03h
Port P1.4 mapping register
P1MAP4
04h
Port P1.5 mapping register
P1MAP5
05h
Port P1.6 mapping register
P1MAP6
06h
Port P1.7 mapping register
P1MAP7
07h
Table 27. Port Mapper for Port P2 (Base Address: 01D0h)
REGISTER DESCRIPTION
REGISTER
OFFSET
Port P2.0 mapping register
P2MAP0
00h
Port P2.1 mapping register
P2MAP2
01h
Port P2.2 mapping register
P2MAP2
02h
Port P2.3 mapping register
P2MAP3
03h
Port P2.4 mapping register
P2MAP4
04h
Port P2.5 mapping register
P2MAP5
05h
Port P2.6 mapping register
P2MAP6
06h
Port P2.7 mapping register
P2MAP7
07h
Copyright 2010, Texas Instruments Incorporated
25
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