參數(shù)資料
型號(hào): MSP430F5419AIZQW
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, RISC MICROCONTROLLER, PBGA113
封裝: PLASTIC, BGA-113
文件頁(yè)數(shù): 78/104頁(yè)
文件大?。?/td> 1004K
代理商: MSP430F5419AIZQW
MSP430F543xA, MSP430F541xA
www.ti.com
SLAS655B – JANUARY 2010 – REVISED OCTOBER 2010
Table 49. Port P5 (P5.0 and P5.1) Pin Functions
CONTROL BITS/SIGNALS(1)
PIN NAME (P5.x)
x
FUNCTION
P5DIR.x
P5SEL.x
REFOUT
P5.0/A8/VREF+/VeREF+
0
P5.0 (I/O)(2)
I: 0; O: 1
0
X
A8/VeREF+(3)
X
1
0
A8/VREF+(4)
X
1
P5.1/A9/VREF–/VeREF–
1
P5.1 (I/O)(2)
I: 0; O: 1
0
X
A9/VeREF– (5)
X
1
0
A9/VREF–(6)
X
1
(1)
X = Don't care
(2)
Default condition
(3)
Setting the P5SEL.0 bit disables the output driver as well as the input Schmitt trigger to prevent parasitic cross currents when applying
analog signals. An external voltage can be applied to VeREF+ and used as the reference for the ADC12_A. Channel A8, when selected
with the INCHx bits, is connected to the VREF+/VeREF+ pin.
(4)
Setting the P5SEL.0 bit disables the output driver as well as the input Schmitt trigger to prevent parasitic cross currents when applying
analog signals. The ADC12_A, VREF+ reference is available at the pin. Channel A8, when selected with the INCHx bits, is connected to
the VREF+/VeREF+ pin.
(5)
Setting the P5SEL.1 bit disables the output driver as well as the input Schmitt trigger to prevent parasitic cross currents when applying
analog signals. An external voltage can be applied to VeREF- and used as the reference for the ADC12_A. Channel A9, when selected
with the INCHx bits, is connected to the VREF-/VeREF- pin.
(6)
Setting the P5SEL.1 bit disables the output driver as well as the input Schmitt trigger to prevent parasitic cross currents when applying
analog signals. The ADC12_A, VREF– reference is available at the pin. Channel A9, when selected with the INCHx bits, is connected to
the VREF-/VeREF- pin.
Copyright 2010, Texas Instruments Incorporated
75
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