參數(shù)資料
型號(hào): MSP430F5435AIPNR
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, RISC MICROCONTROLLER, PQFP80
封裝: PLASTIC, LQFP-80
文件頁數(shù): 72/104頁
文件大小: 1004K
代理商: MSP430F5435AIPNR
MSP430F543xA, MSP430F541xA
www.ti.com
SLAS655B – JANUARY 2010 – REVISED OCTOBER 2010
Table 3. TERMINAL FUNCTIONS
TERMINAL
NO.
I/O(1)
DESCRIPTION
NAME
PZ
PN
ZQW
General-purpose digital I/O
P6.4/A4
1
A1
I/O
Analog input A4 – ADC
General-purpose digital I/O
P6.5/A5
2
E4
I/O
Analog input A5 – ADC
General-purpose digital I/O
P6.6/A6
3
B1
I/O
Analog input A6 – ADC
General-purpose digital I/O
P6.7/A7
4
C2
I/O
Analog input A7 – ADC
General-purpose digital I/O
P7.4/A12
5
F4
I/O
Analog input A12 –ADC
General-purpose digital I/O
P7.5/A13
6
C1
I/O
Analog input A13 – ADC
General-purpose digital I/O
P7.6/A14
7
D2
I/O
Analog input A14 – ADC
General-purpose digital I/O
P7.7/A15
8
G4
I/O
Analog input A15 – ADC
General-purpose digital I/O
Analog input A8 – ADC
P5.0/A8/VREF+/VeREF+
9
D1
I/O
Output of reference voltage to the ADC
Input for an external reference voltage to the ADC
General-purpose digital I/O
Analog input A9 – ADC
P5.1/A9/VREF-/VeREF-
10
E1
I/O
Negative terminal for the ADC's reference voltage for both sources, the
internal reference voltage, or an external applied reference voltage
AVCC
11
E2
Analog power supply
AVSS
12
F2
Analog ground supply
General-purpose digital I/O
P7.0/XIN
13
F1
I/O
Input terminal for crystal oscillator XT1
General-purpose digital I/O
P7.1/XOUT
14
G1
I/O
Output terminal of crystal oscillator XT1
DVSS1
15
G2
Digital ground supply
DVCC1
16
H2
Digital power supply
General-purpose digital I/O with port interrupt
P1.0/TA0CLK/ACLK
17
H1
I/O
TA0 clock signal TACLK input
ACLK output (divided by 1, 2, 4, or 8)
General-purpose digital I/O with port interrupt
P1.1/TA0.0
18
H4
I/O
TA0 CCR0 capture: CCI0A input, compare: Out0 output
BSL transmit output
General-purpose digital I/O with port interrupt
P1.2/TA0.1
19
J4
I/O
TA0 CCR1 capture: CCI1A input, compare: Out1 output
BSL receive input
General-purpose digital I/O with port interrupt
P1.3/TA0.2
20
J1
I/O
TA0 CCR2 capture: CCI2A input, compare: Out2 output
General-purpose digital I/O with port interrupt
P1.4/TA0.3
21
J2
I/O
TA0 CCR3 capture: CCI3A input compare: Out3 output
General-purpose digital I/O with port interrupt
P1.5/TA0.4
22
K1
I/O
TA0 CCR4 capture: CCI4A input, compare: Out4 output
General-purpose digital I/O with port interrupt
P1.6/SMCLK
23
K2
I/O
SMCLK output
P1.7
24
L1
I/O
General-purpose digital I/O with port interrupt
P2.0/TA1CLK/MCLK
25
M1
I/O
TA1 clock signal TA1CLK input
MCLK output
(1)
I = input, O = output, N/A = not available on this package offering
Copyright 2010, Texas Instruments Incorporated
7
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