參數(shù)資料
型號: MSP430F5436AIPZ
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, RISC MICROCONTROLLER, PQFP100
封裝: PLASTIC, LQFP-100
文件頁數(shù): 94/104頁
文件大小: 1004K
代理商: MSP430F5436AIPZ
MSP430F543xA, MSP430F541xA
www.ti.com
SLAS655B – JANUARY 2010 – REVISED OCTOBER 2010
Table 3. TERMINAL FUNCTIONS (continued)
TERMINAL
NO.
I/O(1)
DESCRIPTION
NAME
PZ
PN
ZQW
General-purpose digital I/O
P4.6/TB0.6
49
52
M11
I/O
TB0 capture CCR6: CCI6A/CCI6B input, compare: Out6 output
General-purpose digital I/O
P4.7/TB0CLK/SMCLK
50
53
M12
I/O
TB0 clock input
SMCLK output
General-purpose digital I/O
P5.4/UCB1SOMI/UCB1SCL
51
54
L12
I/O
Slave out, master in – USCI_B1 SPI mode
I2C clock – USCI_B1 I2C mode
General-purpose digital I/O
Clock signal input – USCI_B1 SPI slave mode
P5.5/UCB1CLK/UCA1STE
52
55
J9
I/O
Clock signal output – USCI_B1 SPI master mode
Slave transmit enable – USCI_A1 SPI mode
General-purpose digital I/O
P5.6/UCA1TXD/UCA1SIMO
53
56
K11
I/O
Transmit data – USCI_A1 UART mode
Slave in, master out – USCI_A1 SPI mode
General-purpose digital I/O
P5.7/UCA1RXD/UCA1SOMI
54
57
K12
I/O
Receive data – USCI_A1 UART mode
Slave out, master in – USCI_A1 SPI mode
General-purpose digital I/O
P7.2/TB0OUTH/SVMOUT
55
58
J11
I/O
Switch all PWM outputs high impedance – Timer TB0
SVM output
General-purpose digital I/O
P7.3/TA1.2
56
59
J12
I/O
TA1 CCR2 capture: CCI2B input, compare: Out2 output
General-purpose digital I/O
P8.0/TA0.0
57
60
H9
I/O
TA0 CCR0 capture: CCI0B input, compare: Out0 output
General-purpose digital I/O
P8.1/TA0.1
58
61
H11
I/O
TA0 CCR1 capture: CCI1B input, compare: Out1 output
General-purpose digital I/O
P8.2/TA0.2
59
62
H12
I/O
TA0 CCR2 capture: CCI2B input, compare: Out2 output
General-purpose digital I/O
P8.3/TA0.3
60
63
G9
I/O
TA0 CCR3 capture: CCI3B input, compare: Out3 output
General-purpose digital I/O
P8.4/TA0.4
61
64
G11
I/O
TA0 CCR4 capture: CCI4B input, compare: Out4 output
Regulated core power supply output (internal usage only, no external current
VCORE(2)
62
49
G12
loading)
DVSS2
63
50
F12
Digital ground supply
DVCC2
64
51
E12
Digital power supply
General-purpose digital I/O
P8.5/TA1.0
65
F11
I/O
TA1 CCR0 capture: CCI0B input, compare: Out0 output
General-purpose digital I/O
P8.6/TA1.1
66
E11
I/O
TA1 CCR1 capture: CCI1B input, compare: Out1 output
P8.7
67
N/A
D12
I/O
General-purpose digital I/O
Slave transmit enable – USCI_B2 SPI mode
P9.0/UCB2STE/UCA2CLK
68
N/A
D11
I/O
Clock signal input – USCI_A2 SPI slave mode
Clock signal output – USCI_A2 SPI master mode
General-purpose digital I/O
P9.1/UCB2SIMO/UCB2SDA
69
N/A
F9
I/O
Slave in, master out – USCI_B2 SPI mode
I2C data – USCI_B2 I2C mode
General-purpose digital I/O
P9.2/UCB2SOMI/UCB2SCL
70
N/A
C12
I/O
Slave out, master in – USCI_B2 SPI mode
I2C clock – USCI_B2 I2C mode
(2)
VCORE is for internal usage only. No external current loading is possible. VCORE should only be connected to the recommended
capacitor value, CVCORE.
Copyright 2010, Texas Instruments Incorporated
9
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