參數(shù)資料
型號： MSP430F5517IPNR
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, RISC MICROCONTROLLER, PQFP80
封裝： GREEN, PLASTIC, LQFP-80
文件頁數(shù)： 79/119頁
文件大?。?/td> 1351K
代理商： MSP430F5517IPNR
MSP430F551x
MSP430F552x
SLAS590E
– MARCH 2009 – REVISED APRIL 2011
PMM, SVS Low Side
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SVSLE = 0, PMMCOREV = 2
0
nA
I(SVSL)
SVSL current consumption
SVSLE = 1, PMMCOREV = 2, SVSLFP = 0
200
nA
SVSLE = 1, PMMCOREV = 2, SVSLFP = 1
1.5
μA
SVSLE = 1, dVCORE/dt = 10 mV/μs,
2.5
SVSLFP = 1
tpd(SVSL)
SVSL propagation delay
μs
SVSLE = 1, dVCORE/dt = 1 mV/μs,
20
SVSLFP = 0
SVSLE = 0
→ 1, dVCORE/dt = 10 mV/μs,
12.5
SVSLFP = 1
t(SVSL)
SVSL on/off delay time
μs
SVSLE = 0
→ 1, dVCORE/dt = 1 mV/μs,
100
SVSLFP = 0
PMM, SVM Low Side
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SVMLE = 0, PMMCOREV = 2
0
nA
I(SVML)
SVML current consumption
SVMLE= 1, PMMCOREV = 2, SVMLFP = 0
200
nA
SVMLE= 1, PMMCOREV = 2, SVMLFP = 1
1.5
μA
SVMLE = 1, dVCORE/dt = 10 mV/μs,
2.5
SVMLFP = 1
tpd(SVML)
SVML propagation delay
μs
SVMLE = 1, dVCORE/dt = 1 mV/μs,
20
SVMLFP = 0
SVMLE = 0
→ 1, dVCORE/dt = 10 mV/μs,
12.5
SVMLFP = 1
t(SVML)
SVML on/off delay time
μs
SVMLE = 0
→ 1, dVCORE/dt = 1 mV/μs,
100
SVMLFP = 0
Wake-up from Low Power Modes and Reset
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Wake-up time from LPM2,
PMMCOREV = SVSMLRRL = n,
fMCLK ≥ 4.0 MHz
5
tWAKE-UP-FAST
LPM3, or LPM4 to active
where n = 0, 1, 2, or 3
s
fMCLK < 4.0 MHz
6
mode(1)
SVSLFP = 1
Wake-up time from LPM2,
PMMCOREV = SVSMLRRL = n, where n = 0, 1, 2,
tWAKE-UP-SLOW
LPM3 or LPM4 to active
or 3
150
165
s
mode(2)
SVSLFP = 0
Wake-up time from LPM4.5 to
tWAKE-UP-LPM5
2
3
ms
active mode(3)
Wake-up time from RST or
tWAKE-UP-RESET
2
3
ms
BOR event to active mode(3)
(1)
This value represents the time from the wakeup event to the first active edge of MCLK. The wakeup time depends on the performance
mode of the low side supervisor (SVSL) and low side monitor (SVML). Fastest wakeup times are possible with SVSLand SVML in full
performance mode or disabled when operating in AM, LPM0, and LPM1. Various options are available for SVSLand SVML while
operating in LPM2, LPM3, and LPM4. See the Power Management Module and Supply Voltage Supervisor chapter in the MSP430x5xx
Family User
's Guide (SLAU208).
(2)
This value represents the time from the wakeup event to the first active edge of MCLK. The wakeup time depends on the performance
mode of the low side supervisor (SVSL) and low side monitor (SVML). In this case, the SVSLand SVML are in normal mode (low current)
mode when operating in AM, LPM0, and LPM1. Various options are available for SVSLand SVML while operating in LPM2, LPM3, and
LPM4. See the Power Management Module and Supply Voltage Supervisor chapter in the MSP430x5xx Family User
's Guide
(3)
This value represents the time from the wakeup event to the reset vector execution.
62
Copyright
2009–2011, Texas Instruments Incorporated
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