參數(shù)資料
型號: MSP430FG479IPNR
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 8 MHz, RISC MICROCONTROLLER, PQFP80
封裝: PLASTIC, QFP-80
文件頁數(shù): 7/91頁
文件大小: 1568K
代理商: MSP430FG479IPNR
MSP430FG47x
MIXED SIGNAL MICROCONTROLLER
SLAS580D -- OCTOBER 2008 -- REVISED MARCH 2011
15
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
memory organization
MSP430FG477
MSP430FG478
MSP430FG479
Memory
Main: interrupt vector
Main: code memory
Size
Flash
32KB
0FFFFh to 0FFE0h
0FFFFh to 08000h
48KB
0FFFFh to 0FFE0h
0FFFFh to 04000h
60KB
0FFFFh to 0FFE0h
0FFFFh to 01100h
Information memory
Size
Flash
256 Byte
010FFh to 01000h
256 Byte
010FFh to 01000h
256 Byte
010FFh to 01000h
Boot memory
Size
ROM
1KB
0FFFh to 0C00h
1KB
0FFFh to 0C00h
1KB
0FFFh to 0C00h
RAM
Size
2KB
09FFh to 0200h
2KB
09FFh to 0200h
2KB
09FFh to 0200h
Peripherals
16-bit
8-bit
8-bit SFR
01FFh to 0100h
0FFh to 010h
0Fh to 00h
01FFh to 0100h
0FFh to 010h
0Fh to 00h
01FFh to 0100h
0FFh to 010h
0Fh to 00h
bootstrap loader (BSL)
The MSP430 BSL enables users to program the flash memory or RAM using a UART serial interface. Access
to the MSP430 memory via the BSL is protected by user-defined password. For complete description of the
features of the BSL and its implementation, see the application report Features of the MSP430 Bootstrap
Loader, literature number SLAA089.
BSL FUNCTION
PN PACKAGE PINS
ZQW PACKAGE PINS
Data Transmit
58 - P1.0
C11 - P1.0
Data Receive
57 - P1.1
C12 - P1.1
flash memory (Flash)
The flash memory can be programmed via the JTAG port, the bootstrap loader, or in-system by the CPU. The
CPU can perform single-byte and single-word writes to the flash memory. Features of the flash memory include:
D
Flash memory has n segments of main memory and four segments of information memory (A to D) of
64 bytes each. Each segment in main memory is 512 bytes in size.
D
Segments 0 to n may be erased in one step, or each segment may be individually erased.
D
Segments A to D can be erased individually, or as a group with segments 0 to n.
Segments A to D are also called information memory.
D
Segment A might contain calibration data. After reset, segment A is protected against programming or
erasing. It can be unlocked, but care should be taken not to erase this segment if this calibration data is
required.
D
Flash content integrity check with marginal read modes.
相關PDF資料
PDF描述
MSP430FR5737IDA 16-BIT, 24 MHz, RISC MICROCONTROLLER, PDSO38
MSP430FR5739IDA 16-BIT, 24 MHz, RISC MICROCONTROLLER, PDSO38
MSP430FR5731IRHA 16-BIT, 24 MHz, RISC MICROCONTROLLER, PQCC40
MSP430FR5721IDA 16-BIT, 24 MHz, RISC MICROCONTROLLER, PDSO38
MSP430FR5730IRGE 16-BIT, 24 MHz, RISC MICROCONTROLLER, PQCC24
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