參數(shù)資料
型號: MSP430G2121IRSA16
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, RISC MICROCONTROLLER, PQCC16
封裝: GREEN, PLASTIC, QFN-16
文件頁數(shù): 4/55頁
文件大?。?/td> 1139K
代理商: MSP430G2121IRSA16
MSP430G2x31
MSP430G2x21
SLAS694H
– FEBRUARY 2010 – REVISED AUGUST 2011
Peripherals
Peripherals are connected to the CPU through data, address, and control buses and can be handled using all
instructions. For complete module descriptions, see the MSP430x2xx Family User
's Guide (SLAU144).
Oscillator and System Clock
The clock system is supported by the basic clock module that includes support for a 32768-Hz watch crystal
oscillator, an internal very-low-power low-frequency oscillator and an internal digitally controlled oscillator (DCO).
The basic clock module is designed to meet the requirements of both low system cost and low power
consumption. The internal DCO provides a fast turn-on clock source and stabilizes in less than 1
s. The basic
clock module provides the following clock signals:
Auxiliary clock (ACLK), sourced either from a 32768-Hz watch crystal or the internal LF oscillator.
Main clock (MCLK), the system clock used by the CPU.
Sub-Main clock (SMCLK), the sub-system clock used by the peripheral modules.
Table 9. DCO Calibration Data
(Provided From Factory In Flash Information Memory Segment A)
CALIBRATION
DCO FREQUENCY
SIZE
ADDRESS
REGISTER
CALBC1_1MHZ
byte
010FFh
1 MHz
CALDCO_1MHZ
byte
010FEh
Brownout
The brownout circuit is implemented to provide the proper internal reset signal to the device during power on and
power off.
Digital I/O
There is one 8-bit I/O port implemented
—port P1—and two bits of I/O port P2:
All individual I/O bits are independently programmable.
Any combination of input, output, and interrupt condition is possible.
Edge-selectable interrupt input capability for all the eight bits of port P1 and the two bits of port P2.
Read/write access to port-control registers is supported by all instructions.
Each I/O has an individually programmable pull-up/pull-down resistor.
WDT+ Watchdog Timer
The primary function of the watchdog timer (WDT+) module is to perform a controlled system restart after a
software problem occurs. If the selected time interval expires, a system reset is generated. If the watchdog
function is not needed in an application, the module can be disabled or configured as an interval timer and can
generate interrupts at selected time intervals.
12
Copyright
2010–2011, Texas Instruments Incorporated
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