參數(shù)資料
型號: MT34013
廠商: Aeroflex Inc.
英文描述: EIGHT CHANNEL ARINC DECODER
中文描述: ARINC公司的八通道解碼器
文件頁數(shù): 2/8頁
文件大小: 155K
代理商: MT34013
MT34013
VLSI COMPONENTS FOR ARINC 429 DATA TRANSMISSION SYSTEMS
2
MAXIMUM RATINGS
(Above which the useful life may be impaired)
Storage Temperature - 65oC to +150oC
Temperature (Ambient) under Bias - 55oC to +125oC
Supply Voltage VDD -0.3V to + 7V
DC Input Voltage -0.3 to VDD +0.3V
Output Current (Single O/P) 10mA
Output Current (Total O/P) 20mA
ELECTRICAL CHARACTERISTICS over operating range
PARAMETER
IOH
IOL
VIH
VIL
IIL
IOZ
CI
CI/O
ICC
DESCRIPTION
Output High Current
Output Low Current
Input High Voltage
Input Low Voltage
Input Load Current
Output Leakage Current
Input Capacitance
I/O Capacitance
Supply Current
TEST CONDITIONS
VOH=2.8V
VOL=0.4V
MIN
1.0
3.2
2.4
-0.3
TYP
MAX
UNITS
mA
mA
Volts
Volts
uA
uA
pF
pF
mA
VDD=
4.5V
VCC
0.8
40
40
2.6
9
10
VSS
0.4V
<
VO
<
VCC Output Disabled
Test Frequency = 1.0 MHZ
-40
2
7
VCC = MAX. All inputs
HIGH, All inputs open
.
ARINC 429 SERIAL INPUT INTERFACE
Interfaces are provided for 8 independent Arinc 429 serial input channels with sufficient digital storage to guarantee
no data is lost provided all 8 channels can be accessed within 230
μ
S.
Channels 0,1 & 2 can be programmed for either high or low speed operation. Channels 3 to 7 are configured for
interfacing to low speed Arinc buses only.
Digital Filtering is incorporated on each decoder input port to prevent word corruption due to noise spikes. (The
duration of reject noise spikes is a function of the basic clock period).
Arinc have suggested that the number of labels available to the user can be increased by either using SDI bits 9 and 10
as extra label bits or by using port identification. Both of these techniques have been accommodated in the design.
DATA DETECTION AND WORD TESTS
Each channel is provided with a 32 bit shift register to hold one complete word. The three channels which are
selectable for either high or low speed operation are additionally provided with a 32 bit buffer register.
Each channel contains hardware to test the following parameters:-
(1)
Word length of 32 bits.
(2)
Parity:- odd on good words.
(3)
Gap:- the presence of a 33rd bit is checked for and the output processing is achieved during the remaining
gap for a valid word.
(4)
Interconnection fault (both I/P’s high).
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