參數(shù)資料
型號: MT5C1009F-45/883C
廠商: AUSTIN SEMICONDUCTOR INC
元件分類: SRAM
英文描述: 128K X 8 STANDARD SRAM, 45 ns, CDFP32
封裝: CERAMIC, DFP-32
文件頁數(shù): 10/17頁
文件大?。?/td> 137K
代理商: MT5C1009F-45/883C
SRAM
MT5C1009
MT5C1009
Rev. 6.1 06/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
2
Austin Semiconductor, Inc.
FUNCTIONAL BLOCK DIAGRAM
NOTE: The two least significant row address bits (A8 and A6) are encoded using gray code.
TRUTHTABLE
ROW
DECODER
262,144-BIT
MEMORY ARRAY
I/O
CONTROL
VCC
GND
DQ8
DQ1
CE\
OE\
WE\
A0
A1
A2
A3
A4
A5
A6
A7
A12
COLUMN DECODER
A8 A9 A10 A11 A13 A14 A15 A16
POWER
DOWN
CE\
WE\
OE\
MODE
I/O PIN
SUPPLY CURRENT
H
X
Not Selected
High-Z
ISBT2, ISBC2
X
Not Selected
High-Z
ISBT2, ISBC2
L
H
Output Disable
High-Z
ICC
L
H
L
Read
DOUT
ICC
L
X
Write
DIN
ICC
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