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參數(shù)資料
| 型號(hào)： | MT80C51-36D |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | 1 MM HEIGHT, QFP-44 |
| 文件頁(yè)數(shù)： | 14/170頁(yè) |
| 文件大?。?/td> | 4133K |
| 代理商： | MT80C51-36D |
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110
ATtiny4/5/9/10 [DATASHEET]
8127F–AVR–02/2013
When the NVM Controller is busy performing an operation it will signal this via the NVM Busy Flag in the NVM Con-
trol and Status Register. See “NVMCSR - Non-Volatile Memory Control and Status Register” on page 114. The
NVM Command Register is blocked for write access as long as the busy flag is active. This is to ensure that the
current command is fully executed before a new command can start.
Programming any part of the NVM will automatically inhibit the following operations:
All programming to any other part of the NVM
All reading from any NVM location
ATtiny4/5/9/10 support only external programming. Internal programming operations to NVM have been disabled,
which means any internal attempt to write or erase NVM locations will fail.
15.4.1
Addressing the Flash
The data space uses byte accessing but since the Flash sections are accessed as words and organized in pages,
the byte-address of the data space must be converted to the word-address of the Flash section. This is illustrated
in Figure 15-1. Also, see Table 15-3 on page 107.
The most significant bits of the data space address select the NVM Lock bits or the Flash section mapped to the
data memory. The word address within a page (WADDR) is held by bits [WADDRMSB:1], and the page address
(PADDR) by bits [PADDRMSB:WADDRMSB+1]. Together, PADDR and WADDR form the absolute address of a
word in the Flash section.
The least significant bit of the Flash section address is used to select the low or high byte of the word.
Figure 15-1. Addressing the Flash Memory
15.4.2
Reading the Flash
The Flash can be read from the data memory mapped locations one byte at a time. For read operations, the least
significant bit (bit 0) is used to select the low or high byte in the word address. If this bit is zero, the low byte is read,
and if it is one, the high byte is read.
00
PAGE
01
02
SECTIONEND
WORD
00
01
PAGEEND
FLASH
SECTION
FLASH
PAGE
0/1
WADDR
PADDR
1
WADDRMSB
PADDRMSB
16
ADDRESS POINTER
...
PAGE ADDRESS
WITHIN A FLASH
SECTION
WORD ADDRESS
WITHIN A FLASH
PAGE
LOW/HIGH
BYTE SELECT
WADDRMSB+1
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相關(guān)代理商/技術(shù)參數(shù) |
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| MT80C51BH | 制造商:ROCHESTER 制造商全稱:ROCHESTER 功能描述:CMOS SINGLE - CHIP 8-BIT MICROCOMPUTER 64K program Memory Space |
| MT80C51FB | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MT80C51FB/B | 制造商:Intel 功能描述: |
| MT80GB | 制造商:Datak Corporation 功能描述: |
| MT80JSF1G72NDY-1G1F1A2 | 制造商:Micron Technology Inc 功能描述:8GB 1GX72 DDR3 SDRAM MODULE PBF DIMM 1.5V REGISTERED - Trays |
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