參數(shù)資料
型號: MT80C51C-20R
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP44
文件頁數(shù): 43/109頁
文件大?。?/td> 10824K
代理商: MT80C51C-20R
287
7593L–AVR–09/12
AT90USB64/128
Figure 24-3. Pipe activation flow.
Once the Pipe is activated (EPEN set) and, the hardware is ready to send requests to the
Device.
When configured (CFGOK = 1), only the Pipe Token (PTOKEN) and the polling interval for Inter-
rupt pipe can be modified.
A Control type pipe supports only one bank. Any other value will lead to a configuration error
(CFGOK = 0).
A clear of PEN will reset the configuration of the Pipe. All the corresponding Pipe registers are
reset to there reset values. Please refer to “Memory management” on page 252 for more details.
Note: The firmware has to configure the Default Control Pipe with the following parameters:
Type: Control
Token: SETUP
Data bank: 1
Size: 64 Bytes
The firmware asks for eight bytes of the Device Descriptor sending a GET_DESCRIPTOR
request. These bytes contains the MaxPacketSize of the Device default control endpoint and the
firmware re-configures the size of the Default Control Pipe with this size parameter.
Pipe
Activ ation
UPCONX
PENABLE=1
UPCFG0X
PTYPE
PTOKEN
PEPNUM
CFGOK=1
ERROR
No
Yes
UPCFG2X
INTFRQ
(interruptonly)
Pipeactiv ated
and f reezed
UPCFG1X
PSIZE
PBK
CFGMEM
Enablethepipe
SelectthePipetype:
*Type(Control,Bulk,Interrupt)
*Token(IN,OUT,SETUP)
*Endpointnumber
ConfigurethePipememory:
*Pipesize
*Numberofbanks
Configurethepollinginterval
forInterruptpipe
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