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參數(shù)資料
| 型號(hào)： | MT89L86 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Multiple Rate Digital Switch(多速率數(shù)字開關(guān)) |
| 中文描述： | 多速率數(shù)字交換機(jī)（多速率數(shù)字開關(guān)） |
| 文件頁數(shù)： | 15/40頁 |
| 文件大?。?/td> | 173K |
| 代理商： | MT89L86 |
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Advance Information
MT89L86
15
Interface Mode Selection Register - Read/Write
Figure 4 - IMS Register Description
Bit
Name
Description
7
DMO
Device Main Operation.
This bit is used by the CPU to define one of the two main
operations of the 3.3V MT89L86. If this bit is LOW, the MT89L86 is configured for
identical I/O data rates. For this operation, the user should also specify the switching
configuration through the SCB bits.
If this bit is HIGH, the MT89L86 is configured in Different I/O data rate. This allows
combinations of input and output data rates as shown in Table 2. The SCB bits have no
effect in this application and the device is in Non-Blocking switch configuration with a 256
x 256 channel capacity.
6-5
IDR1-0
Input Data Rate Selection.
These two bits select three different data rates for the inputs
of the MT89L86. In the case of identical I/O rates (DMO bit = 0), these bits also
determine the serial output data rate.
IDR1
0
0
1
1
IDR0
0
1
0
1
Input Rate
2.048 Mb/s
4.096 Mb/s
8.192 Mb/s
reserved
4-3
ODR1-0
Output Data Rate Selection.
These bits are only used when Different I/O rates are
selected (DMO bit=1). These two bits select three different data rates for the serial
outputs of the MT89L86. These bits are ignored if DMO bit = 0.
ODR1
0
0
1
1
ODR0
0
1
0
1
Output Rate
2.048 Mb/s
4.096 Mb/s
8.192 Mb/s
reserved
2-1
SCB1-0
Switching Configuration Bits 1-0.
These bits should only be used when DMO is set
LOW. The use of these bits to select the switching configuration of the MT89L86 is
described in Table 8.
0
CLKM
Clock Mode.
This bit is only used when the MT89L86 is set to operate in identical I/O
data rates. When set High, this bit selects the interface clock to be equal to the bit rate. If
Low, this bit selects the interface clock to be twice the bit rate.
For Different I/O data rate applications, this bit is ignored.
DMO
IDR1
IDR0
ODR1
ODR0
SCB1
SCB0
CLKM
7
6
5
4
3
2
1
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT89L86 | CMOS ST-BUS⑩ FAMILY Multiple Rate Digital Switch |
| MT89L86AN | CMOS ST-BUS⑩ FAMILY Multiple Rate Digital Switch |
| MT89L86AP | CMOS ST-BUS⑩ FAMILY Multiple Rate Digital Switch |
| MT90210 | Multi-Rate Parallel Access Circuit(并行多路存取電路) |
| MT90210 | Multi-Rate Parallel Access Circuit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT89L86AN | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:CMOS ST-BUS⑩ FAMILY Multiple Rate Digital Switch |
| MT89L86AN1 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 256 X 256/512 X 256/128 X 128 131.072MBPS 3.3V 4 - Rail/Tube 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM/TSI SWITCH 512X256 48SSOP 制造商:Microsemi Corporation 功能描述:IC TDM/TSI SWITCH 512X256 48SSOP |
| MT89L86ANR1 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 256 X 256/512 X 256/128 X 128 131.072MBPS 3.3V 4 - Tape and Reel 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM/TSI SWITCH 512X256 48SSOP 制造商:Microsemi Corporation 功能描述:IC TDM/TSI SWITCH 512X256 48SSOP |
| MT89L86AP | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:CMOS ST-BUS⑩ FAMILY Multiple Rate Digital Switch |
| MT89L86AP1 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 256 X 256/512 X 256/128 X 128 131.072MBPS 3.3V 4 - Rail/Tube 制造商:Microsemi Corporation 功能描述:IC TDM/TSI SWITCH 512X256 44PLCC |
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