參數(shù)資料
型號： MT9075B
廠商： Mitel Networks Corporation
英文描述： E1 Single Chip Transceiver
中文描述： 素E1單芯片收發(fā)器
文件頁數(shù)： 36/78頁
文件大?。?/td> 347K
代理商： MT9075B
MT9075B
Preliminary Information
36
Table 23 - Interrupt Mask Word One
(Page 01H, Address 1CH) (continued)
Table 23 - Interrupt Mask Word One
(Page 01H, Address 1CH)
Table 24 - Interrupt Mask Word Two
(Page 01H, Address 1DH) (continued)
Bit
Name
Functional Description
7
EBI
(0)
Receive E-bit Interrupt.
When
unmasked an interrupt is initiated
when a receive E-bit indicates a
remote
CRC-4
unmasked, 0 - masked. Interrupt
vector = 00100000.
error.
1
-
6
CRCI
(0)
CRC-4 Error Interrupt.
When
unmasked an interrupt is initiated
when a local CRC-4 error occurs. 1
- unmasked, 0 - masked. Interrupt
vector = 00100000.
5
CEFI
(0)
Consecutively
Interrupt.
interrupt is initiated when two
consecutive
errored
alignment signals are received. 1 -
unmasked, 0 - masked. Interrupt
vector = 00100000.
Errored
FASs
When unmasked an
frame
4
BPVI
(0)
Bipolar Violation Interrupt.
When
unmasked an interrupt is initiated
when a bipolar violation error
occurs. 1 - unmasked, 0 - masked.
Interrupt vector = 00100000.
3
RCR0I
(0)
RAI and Continuous CRC Error
Interrupt.
When unmasked an
interrupt is initiated when the
received A bit has been one, and
the received E bits have been zero,
continuously for greater than 10
milliseconds
(see
address 19H) 1- unmasked, 0 -
masked.
Interrupt
00100000.
page
04H,
vector
=
2
RCR1I
(0)
RAI and Continuous CRC Error
Interrupt.
When unmasked an
interrupt is initiated when the
received A bit had been set, and the
received
E
bits
continuously for greater than 10
milliseconds, but less than 450
milliseconds
(see
address 19H). 1 - unmasked, 0 -
masked.
Interrupt
00100000.
were
low,
page
04H,
vector
=
1
BERI
(0)
Bit
unmasked an interrupt is initiated
when a bit error occurs. 1 -
unmasked, 0 - masked. Interrupt
vector = 00100000.
Error
Interrupt.
When
Bit
Name
Functional Description
0
SIGI
(0)
Signalling (CAS) Interrupt.
When
unmasked and any of the receive
ABCD bits of any channel changes
state an interrupt is initiated. 1 -
unmasked, 0 - masked. Interrupt
vector = 00000001
Bit
Name
Functional Description
7
EBOI
(0)
Receive E-bit Counter Overflow
Interrupt.
When unmasked an
interrupt is initiated when the E-bit
error
counter
unmasked, 0 - masked. Interrupt
vector = 00010000.
overflows.
1
-
6
CRCOI
(0)
CRC-4 Error Counter Overflow
Interrupt.
When unmasked an
interrupt is initiated when the CRC-4
error
counter
unmasked, 0 - masked. Interrupt
vector = 00010000.
overflows.
1
-
5
CALNI
(0)
CRC-4 Alignment Interrupt.
When
unmasked an interrupt is initiated
when the CALN status bit of page
03H, address 12H changes state. 1
- unmasked, 0 - masked. Interrupt
vector = 00001000.
4
FEROI
(0)
Frame Alignment Signal Error
Counter Overflow Interrupt.
When
unmasked an interrupt is initiated
when the frame alignment signal
error
counter
unmasked, 0 - masked. Interrupt
vector = 00010000.
overflows.
1
-
3
JAI
(0)
Jitter
When unmasked, an interrupt will
be
initiated
when
attenuator FIFO comes within four
bytes of an overflow or underflow
condition. 1 - unmasked, 0 -
masked.
Interrupt
00000100.
Attenuation
Interrupt.
the
jitter
vector
=
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參數(shù)描述
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