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參數(shù)資料
| 型號： | MT9171 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | ISO2-CMOS ST-BUS FAMILY |
| 中文描述： | ISO2 -意法半導(dǎo)體的CMOS總線家庭 |
| 文件頁數(shù)： | 3/25頁 |
| 文件大小： | 401K |
| 代理商： | MT9171 |
Advance Information
MT9171/72
9-117
13
14
16
DSTi/Di
Data ST-BUS In/Data In
mode. In MOD mode this is a continuous bit stream at the bit rate selected.
(Digital). A 2.048 Mbit/s serial PCM/data input in DN
14
15
17
F0o/RCK
Frame Pulse Out/Receive Bit Rate Clock
wide negative pulse indicating the end of the active channel times of the device to
allow daisy chaining. In MOD mode provides the receive bit rate clock to the
system.
output (Digital). In DN mode a 244 ns
15
16
19
C4/TCK
Data Clock/Transmit Baud Rate Clock
clock input for the MASTER and output for the SLAVE in DN mode. For MOD
mode this pin provides the transmit bit rate clock to the system.
Oscillator Output
. CMOS Output.
Oscillator Input
. CMOS Input. D.C. couple signals to this pin. Refer to D.C.
Electrical Characteristics for OSC1 input requirements.
Precanceller Disable.
When held to Logic ’1
precanceller is forced to V
Bias
thus bypassing the precanceller section. When
logic ’0’, the L
OUT
to the precanceller path is enabled and functions normally. An
internal pulldown (50 k
) is provided on this pin.
No Connection.
Leave open circuit
(Digital). A 4.096 MHz TTL compatible
16
17
17
19
21
22
OSC2
OSC1
18
20
23
Precan
’,
the internal path from L
OUT
to the
8,
18
1,6,
11,
18,
20,
25
24
NC
19
21
L
OUT
DIS
L
logic “0”, L
pin.
Test Pin.
Receive Signal
Positive Power Supply
OUT
Disable.
When held to logic “1”, L
functions normally. An internal pulldown (50 k
OUT
is disabled (i.e., output = V
Bias
). When
OUT
) is provided on this
20
21
22
22
23
24
26
27
28
TEST
L
IN
V
DD
Connect to V
input (Analog).
SS
.
(+5V) input.
Pin Description (continued)
Pin #
Name
Description
22
24
28
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT9171AE | ISO2-CMOS ST-BUS FAMILY |
| MT9171AN | ISO2-CMOS ST-BUS FAMILY |
| MT9171AP | ISO2-CMOS ST-BUS FAMILY |
| MT9171 | ISO2-CMOS ST-BUS⑩ FAMILY Digital Subscriber Interface Circuit Digital Network Interface Circuit |
| MT9171AE | ISO2-CMOS ST-BUS⑩ FAMILY Digital Subscriber Interface Circuit Digital Network Interface Circuit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT9171_06 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Digital Subscriber Interface Circuit Digital Network Interface Circuit |
| MT9171AE | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:ISO2-CMOS ST-BUS FAMILY |
| MT9171AE1 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Digital Subscriber Interface Circuit Digital Network Interface Circuit |
| MT9171AN | 制造商:Microsemi Corporation 功能描述: |
| MT9171AN1 | 制造商:Zarlink Semiconductor Inc 功能描述:PB FREE DNIC 1.5UM - Rail/Tube |
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