![](http://datasheet.mmic.net.cn/90000/MTA81010-RC-P_datasheet_3509033/MTA81010-RC-P_21.png)
1995 Microchip Technology Inc.
DS39005D-page 21
MTA81010
4.5
I/O PROGRAMMING
CONSIDERATIONS
4.5.1
BIDIRECTIONAL I/O PORTS
a)
Some instructions operate internally as read
followed by write operations. The BCF and BSF
instructions, for example, read the entire port
into the CPU, execute the bit operation, and
then re-output the result. Caution must be used
when these instructions are applied to a port
where one or more pins are used as input/
outputs. For example, a BSF operation on bit5 of
f6 (Port B) will cause all eight bits of f6 to be read
into the CPU. Then the BSF operation takes
place on bit5 and f6 is re-output to the output
latches. If another bit of f6 is used as a bidirec-
tional I/O pin (say bit0) and it is defined as an
input at this time, the input signal present on the
pin itself would be read into the CPU and rewrit-
ten to the data latch of this particular pin, over-
writing the previous content. As long as the pin
stays in the input mode, no problem occurs.
However, if bit0 is switched into output mode
later on, the content of the data latch may now
be unknown.
b)
A pin actively outputting a "0" or "1" should not
be driven from external devices at the same time
in order to change the level on this pin ("wired-
or", "wired-and"). The resulting high output cur-
rents may damage the chip.
For "wired-or" outputs (assuming negative
logic), it is recommended to use external pull-up
resistors on the corresponding pins. The pin
should be left in high-impedance mode, unless
a "0" has to be output. Thus, external devices
can drive this pin "0" as well. "Wired-and"
outputs can be realized in the same way, but
with external pull-down resistors and only
actively driving the "1" level from the PIC16C54.
The resistor values are user selectable, but
should not
force output currents above the
specified limits (Section 15.0).
4.5.2
SUCCESSIVE OPERATIONS ON I/O
PORTS
The actual write to an I/O port happens at the end of an
instruction cycle, whereas for reading, the data must be
valid at the beginning (Figure 4-2) of the instruction
cycle. Therefore, care must be exercised if a write
followed by a read operation is carried out on the same
I/O port. The sequence of instructions should be such
to allow the pin voltage to stabilize (load dependent)
before the next instruction which causes that file to be
read into the CPU is executed. Otherwise, the previous
state of that pin may be read into the CPU rather than
the new state. When in doubt, it is better to separate
these instructions with a NOP or an other instruction
not accessing this I/O port.
4.5.3
OPERATION IN NOISY ENVIRONMENT
In noisy application environments, such as keyboards
which are exposed to ESD (Electro Static Discharge),
register contents can get corrupted due to noise spikes.
The on-chip watchdog timer will take care of all
situations involving program sequence "lockups."
However, if an I/O control register gets corrupted, the
program sequence may still be executed properly
although
an
input
pin
may
have
switched
unintentionally to an output. In this case, the program
would always read the same value on this pin. This
may result, for example, in a keyboard "lockup"
situation without leading to a watchdog timer time-out.
Thus, it is recommended to redefine all I/O pins in
regular time intervals (inputs as well as outputs). The
optimal strategy is to update the I/O control register
every time before reading input data or writing output
data.
FIGURE 4-2:
I/O PORT READ/WRITE TIMING
Note:
This example shows a write to PORTB
followed by a read from PORTB.
Note that:
data setup time = (0.25 TCY - TPD)
where TCY = instruction cycle.
Therefore, at higher clock frequencies,
a write followed by a read may be problematic.
PC
PC + 1
PC + 2
PC + 3
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4 Q1 Q2 Q3 Q4
Q1
Q2
Q3 Q4
Instruction
fetched
RB7:RB0>
MOVWF f6
NOP
Port pin
sampled here
NOP
Instruction
executed
MOVWF f6
NOP
TPD
Execute
MOVF f6,W
Execute
Write to f6
PORTB
MOVWF f6
Read to f6
PORTB