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參數(shù)資料
| 型號： | MTA81010S-XTI/SO |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDSO28 |
| 封裝： | 0.300 INCH, SOIC-28 |
| 文件頁數(shù)： | 22/76頁 |
| 文件大?。?/td> | 745K |
| 代理商： | MTA81010S-XTI/SO |
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1995 Microchip Technology Inc.
DS39005D-page 29
MTA81010
GOTO
Unconditional Branch
Syntax:
GOTOk
Encoding:
Words:
1
Cycles:
2
Operation:
k
→ PC<8:0>, PA2, PA1, PA0
→ PC<11:9>;
Status bits:
None
Description:
GOTO is an unconditional branch. The
eleven bit immediate value is loaded
into PC bits <10:0>. The upper bits of
PC are loaded from PCLATH <4:3>.
GOTO is a 2-cycle instruction.
INCF
Increment f
Syntax:
INCF f,d
Encoding:
Words:
1
Cycles:
1
Operation:
(f + 1)
→ d
Status bits:
C, DC, Z
Description:
The
contents
of
register
“f”
are
incremented. If “d” is 0 the result is
placed in the W register. If “d” is 1 the
result is placed back in register “f”.
INCFSZ
Increment f, skip if 0
Syntax:
INCFSZ f,d
Encoding:
Words:
1
Cycles:
1 (2)
Operation:
(f + 1)
→ d, skip if result = 0
Status bits:
None
Description:
The
contents
of
register
“f”
are
incremented. If “d” is 0 the result is
placed in the W register. If “d” is 1 the
result is placed back in register “f”. If
the result is 0 the next instruction is
skipped.
If the result is 0, the next instruction,
which is already fetched, is discarded.
A NOP is executed instead making it a
2-cycle instruction.
101k
kkkk
0010
10df
ffff
0011
11df
ffff
IORLW
Inclusive OR Literal with W
Syntax:
IORLW k
Encoding:
Words:
1
Cycles:
1
Operation:
(W .OR. k)
→ W
Status bits:
Z
Description:
The contents of the W register are
OR’ed with the 8-bit literal “k”. The
result is placed in the W register.
IORWF
Inclusive OR W with f
Syntax:
IORWF f,d
Encoding:
Words:
1
Cycles:
1
Operation:
(W .OR. f)
→ d
Status bits:
Z
Description:
Inclusive OR the W register with
register “f”. If “d” is 0 the result is stored
in the W register. If “d” is 1 the result is
stored back in register “f”.
MOVF
Move f
Syntax:
MOVF f,d
Encoding:
Words:
1
Cycles:
1
Operation:
(f)
→ d
Status bits:
Z
Description:
The contents of register "f" are moved.
If "d" is 0 the result is placed in the W
register. If "d" is 1 the result is placed
back in register "f".
MOVLW
Move Literal to W
Syntax:
MOVLW k
Encoding:
Words:
1
Cycles:
1
Operation:
k
→ W
Status bits:
None
Description:
The 8-bit literal “k” is loaded into W
register.
1101
kkkk
0001
00df
ffff
0010
00df
ffff
1100
kkkk
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